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參數(shù)資料
| 型號： | AT24C64-10PI-1.8 |
| 廠商： | ATMEL CORP |
| 元件分類： | DRAM |
| 英文描述： | CAP 2.2UF 16V 10% TANT SMD-3216-18 TR |
| 中文描述： | 8K X 8 I2C/2-WIRE SERIAL EEPROM, PDIP8 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001BA, DIP-8 |
| 文件頁數(shù)： | 7/15頁 |
| 文件大小： | 237K |
| 代理商： | AT24C64-10PI-1.8 |
AT24C32/64
7
Device Addressing
The 32K/64K EEPROM requires an 8-bit device address
word following a start condition to enable the chip for a read
or write operation (refer to Figure 1). The device address
word consists of a mandatory one, zero sequence for the
first four most significant bits as shown. This is common to
all 2-wire EEPROM devices.
The 32K/64K uses the three device address bits A2, A1, A0
to allow as many as eight devices on the same bus. These
bits must compare to their corresponding hardwired input
pins. The A2, A1, and A0 pins use an internal proprietary
circuit that biases them to a logic low condition if the pins
are allowed to float.
The eighth bit of the device address is the read/write opera-
tion select bit. A read operation is initiated if this bit is high
and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will
output a zero. If a compare is not made, the device will
return to standby state.
NOISE PROTECTION:
Special internal circuitry placed on
the SDA and SCL pins prevent small noise spikes from
activating the device. A low-V
CC
detector (5-volt option)
resets the device to prevent data corruption in a noisy envi-
ronment.
DATA SECURITY:
The AT24C32/64 has a hardware data
protection scheme that allows the user to write protect the
upper quadrant (8/16K bits) of memory when the WP pin is
at V
CC
.
Write Operations
BYTE WRITE:
A write operation requires two 8-bit data
word addresses following the device address word and
acknowledgment. Upon receipt of this address, the
EEPROM will again respond with a zero and then clock in
the first 8-bit data word. Following receipt of the 8-bit data
word, the EEPROM will output a zero and the addressing
device, such as a microcontroller, must terminate the write
sequence with a stop condition. At this time the EEPROM
enters an internally-timed write cycle, t
WR
, to the nonvolatile
memory. All inputs are disabled during this write cycle and
the EEPROM will not respond until the write is complete
(refer to Figure 2).
PAGE WRITE:
The 32K/64K EEPROM is capable of 32-
byte page writes.
A page write is initiated the same way as a byte write, but
the microcontroller does not send a stop condition after the
first data word is clocked in. Instead, after the EEPROM
acknowledges receipt of the first data word, the microcon-
troller can transmit up to 31 more data words. The
EEPROM will respond with a zero after each data word
received. The microcontroller must terminate the page
write sequence with a stop condition (refer to Figure 3).
The data word address lower 5 bits are internally incre-
mented following the receipt of each data word. The higher
data word address bits are not incremented, retaining the
memory page row location. When the word address, inter-
nally generated, reaches the page boundary, the following
byte is placed at the beginning of the same page. If more
than 32 data words are transmitted to the EEPROM, the
data word address will “roll over” and previous data will be
overwritten.
ACKNOWLEDGE POLLING:
Once the internally-timed
write cycle has started and the EEPROM inputs are dis-
abled, acknowledge polling can be initiated. This involves
sending a start condition followed by the device address
word. The read/write bit is representative of the operation
desired. Only if the internal write cycle has completed will
the EEPROM respond with a zero, allowing the read or
write sequence to continue.
Read Operations
Read operations are initiated the same way as write opera-
tions with the exception that the read/write select bit in the
device address word is set to one. There are three read
operations: current address read, random address read
and sequential read.
CURRENT ADDRESS READ:
The internal data word
address counter maintains the last address accessed dur-
ing the last read or write operation, incremented by one.
This address stays valid between operations as long as the
chip power is maintained. The address “roll over” during
read is from the last byte of the last memory page, to the
first byte of the first page. The address “roll over” during
write is from the last byte of the current page to the first
byte of the same page.
Once the device address with the read/write select bit set
to one is clocked in and acknowledged by the EEPROM,
the current address data word is serially clocked out. The
microcontroller does not respond with an input zero but
does generate a following stop condition (refer to Figure 4).
RANDOM READ:
A random read requires a “dummy” byte
write sequence to load in the data word address. Once the
device address word and data word address are clocked in
and acknowledged by the EEPROM, the microcontroller
must generate another start condition. The microcontroller
now initiates a current address read by sending a device
address with the read/write select bit high. The EEPROM
acknowledges the device address and serially clocks out
the data word. The microcontroller does not respond with a
zero but does generate a following stop condition (refer to
Figure 5).
SEQUENTIAL READ:
Sequential reads are initiated by
either a current address read or a random address read.
After the microcontroller receives a data word, it responds
with an acknowledge. As long as the EEPROM receives an
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AT24C32-10TC-1.8 | 122 x 32 pixel format, Compact LCD size |
| AT24C64-10TC-1.8 | 122 x 32 pixel format, Compact LCD size |
| AT24C32-10TI-1.8 | 128 x 64 pixel format, LED or EL Backlight available |
| AT24C64-10TI-1.8 | 128 x 64 pixel format, LED or EL Backlight available |
| AT24C32W-10SC | 2-Wire Serial EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT24C64-10PI-2.5 | 功能描述:IC EEPROM 64KBIT 400KHZ 8DIP 制造商:microchip technology 系列:- 包裝:管件 零件狀態(tài):停產(chǎn) 存儲器類型:非易失 存儲器格式:EEPROM 技術(shù):EEPROM 存儲容量:64Kb （8K x 8） 時鐘頻率:400kHz 寫周期時間 - 字，頁:10ms 訪問時間:900ns 存儲器接口:I2C 電壓 - 電源:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C（TA） 安裝類型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商器件封裝:8-PDIP 基本零件編號:AT24C64 標(biāo)準(zhǔn)包裝:50 |
| AT24C64-10PI-2.7 | 功能描述:電可擦除可編程只讀存儲器 32/64k 2-Wire Bus RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| AT24C64-10TC-1.8 | 功能描述:IC EEPROM 64KBIT 400KHZ 8TSSOP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:378 系列:- 格式 - 存儲器:閃存 存儲器類型:FLASH 存儲容量:8M（1M x 8，512K x 16） 速度:110ns 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-CBGA 供應(yīng)商設(shè)備封裝:48-CBGA（7x7） 包裝:托盤 |
| AT24C64-10TC-2.5 | 功能描述:IC EEPROM 64KBIT 400KHZ 8TSSOP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:378 系列:- 格式 - 存儲器:閃存 存儲器類型:FLASH 存儲容量:8M（1M x 8，512K x 16） 速度:110ns 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-CBGA 供應(yīng)商設(shè)備封裝:48-CBGA（7x7） 包裝:托盤 |
| AT24C64-10TC-2.7 | 功能描述:IC EEPROM 64KBIT 400KHZ 8TSSOP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:378 系列:- 格式 - 存儲器:閃存 存儲器類型:FLASH 存儲容量:8M（1M x 8，512K x 16） 速度:110ns 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-CBGA 供應(yīng)商設(shè)備封裝:48-CBGA（7x7） 包裝:托盤 |
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