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參數(shù)資料
| 型號： | AT24C02A-10TC |
| 廠商： | ATMEL CORP |
| 元件分類： | DRAM |
| 英文描述： | 2-Wire Serial EEPROM |
| 中文描述： | 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8 |
| 封裝： | 0.170 INCH, PLASTIC, TSSOP-8 |
| 文件頁數(shù)： | 11/20頁 |
| 文件大?。?/td> | 523K |
| 代理商： | AT24C02A-10TC |
11
AT24C02A/04A/08A/16A
5083A–SEEPR–9/04
Read Operations
Read operations are initiated the same way as write operations with the exception that
the read/write select bit in the device address word is set to “1”. There are three read
operations: current address read, random address read and sequential read.
CURRENT ADDRESS READ:
The internal data word address counter maintains the
last address accessed during the last read or write operation, incremented by one. This
address stays valid between operations as long as the chip power is maintained. The
address “roll over” during read is from the last byte of the last memory page to the first
byte of the first page. The address “roll over” during write is from the last byte of the cur-
rent page to the first byte of the same page.
Once the device address with the read/write select bit set to “1” is clocked in and
acknowledged by the EEPROM, the current address data word is serially clocked out.
The microcontroller does not respond with an input “0” but does generate a following
stop condition, as shown in Figure 10.
Figure 10.
Current Address Read
RANDOM READ:
A random read requires a “dummy” byte write sequence to load in the
data word address. Once the device address word and data word address are clocked
in and acknowledged by the EEPROM, the microcontroller must generate another start
condition. The microcontroller now initiates a current address read by sending a device
address with the read/write select bit high. The EEPROM acknowledges the device
address and serially clocks out the data word. The microcontroller does not respond
with a “0” but does generate a following stop condition, as shown in Figure 11.
Figure 11.
Random Read
SEQUENTIAL READ:
Sequential reads are initiated by either a current address read or
a random address read. After the microcontroller receives a data word, it responds with
an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to
increment the data word address and serially clock out sequential data words. When the
memory address limit is reached, the data word address will “roll over” and the sequen-
tial read will continue. The sequential read operation is terminated when the
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AT24C02A-10TC-2.5 | 2-Wire Serial EEPROM |
| AT24C02A-10TC-2.7 | 2-Wire Serial EEPROM |
| AT24C02A-10TI | 2-Wire Serial EEPROM |
| AT24C02A-10TI-2.7 | 2-Wire Serial EEPROM |
| AT24C02A-10PE-2.7 | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT24C02A-10TC-1.8 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:2-Wire Serial EEPROM |
| AT24C02A-10TC-2.5 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:2-Wire Serial EEPROM |
| AT24C02A-10TC2.7 | 制造商:Atmel Corporation 功能描述: |
| AT24C02A-10TC-2.7 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:2-Wire Serial EEPROM |
| AT24C02A-10TI | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:2-Wire Serial EEPROM |
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