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參數(shù)資料
| 型號(hào)： | AT17N010 |
| 廠商： | Atmel Corp. |
| 英文描述： | CAT5 SHLD, PVC PATCH CBL STRGHT PIN, 100 MHZ-GREEN |
| 中文描述： | FPGA配置存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 1/18頁(yè) |
| 文件大?。?/td> | 205K |
| 代理商： | AT17N010 |
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1
Features
EE Programmable 262,144 x 1-, 524,288 x 1-, 1,048,576 x 1-, 2,097,152 x 1-, and
4,194,304 x 1-bit Serial Memories Designed to Store Configuration Programs for Field
Programmable Gate Arrays (FPGAs)
Available as a 3.3V (±10%) Commercial and Industrial Version
Simple Interface to SRAM FPGAs
Pin Compatible with Xilinx
XC17SXXXA and XC17SXXXXL PROMs
Compatible with Xilinx Spartan
-II, Spartan-IIE and Spartan XL FPGAs in Master Serial
Mode
Very Low-power CMOS EEPROM Process
Available in 6 mm x 6 mm x 1 mm 8-lead LAP (Pin-compatible with 8-lead SOIC/VOIC
Packages), 8-lead PDIP, 8-lead SOIC, 20-lead SOIC and 44-lead TQFP Packages for a
Specific Density
Low-power Standby Mode
High-reliability
– Endurance: Minimum 10 Write Cycles
– Data Retention: 20 Years at 85
°
C
Description
The AT17N series FPGA Configuration EEPROM (Configurators) provide an easy-to-
use, cost-effective configuration memory for Field Programmable Gate Arrays. The
AT17N series device is packaged in the 8-lead LAP, 8-lead PDIP, 8-lead SOIC, 20-lead
SOIC and 44-lead TQFP, see Table 1. The AT17N series Configurators uses a simple
serial-access procedure to configure one or more FPGA devices.
The AT17N series configurators can be programmed with industry-standard program-
mers, Atmel’s ATDH2200E Programming Kit or Atmel’s ATDH2225 ISP Cable and
factory programming.
Note:
1. The 8-lead LAP package has the same footprint as the 8-lead SOIC. Since an 8-
lead SOIC package is not available for the AT17N512/010/002 devices, it is possi-
ble to use an 8-lead LAP package instead.
Table 1.
AT17N Series Packages
Package
AT17N256
AT17N512/
AT17N010
AT17N002
AT17N040
8-lead LAP
–
Yes
Yes
–
8-lead PDIP
Yes
Yes
–
–
8-lead SOIC
Yes
Use 8-lead LAP
(1)
Use 8-lead LAP
(1)
–
20-lead SOIC
Yes
Yes
Yes
–
44-lead TQFP
–
–
Yes
Yes
FPGA
Configuration
Memory
AT17N256
AT17N512
AT17N010
AT17N002
AT17N040
3.3V
System Support
Rev. 3020A–CNFG–05/03
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AT17N010-10CC | CAT5 SHLD, PVC PATCH CBL STRGHT PIN, 100 MHZ-GREEN |
| AT17N010-10CI | CAT5 SHLD, PVC PATCH CBL STRGHT PIN, 100 MHZ-GREEN |
| AT17N010-10PC | CAT5 SHLD, PVC PATCH CBL STRGHT PIN, 100 MHZ-GREEN |
| AT18V8Z-25DC | UV-Erasable/OTP PLD |
| AT18V8Z-25JC | UV-Erasable/OTP PLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT17N010-10CC | 功能描述:FPGA-配置存儲(chǔ)器 1M bit FPGA RoHS:否 制造商:Altera Corporation 存儲(chǔ)類(lèi)型:Flash 存儲(chǔ)容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| AT17N010-10CI | 功能描述:FPGA-配置存儲(chǔ)器 ASICS RoHS:否 制造商:Altera Corporation 存儲(chǔ)類(lèi)型:Flash 存儲(chǔ)容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| AT17N010-10PC | 功能描述:FPGA-配置存儲(chǔ)器 CONFIG SERIAL EEPROM 1M NTP-0MHZ RoHS:否 制造商:Altera Corporation 存儲(chǔ)類(lèi)型:Flash 存儲(chǔ)容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| AT17N010-10PI | 功能描述:FPGA-配置存儲(chǔ)器 10MHZ IND TEMP FPGA CONFIG EEPROM RoHS:否 制造商:Altera Corporation 存儲(chǔ)類(lèi)型:Flash 存儲(chǔ)容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| AT17N010-10SC | 功能描述:FPGA-配置存儲(chǔ)器 CONFIG SERIAL EEPROM 1M NTP-10MHZ RoHS:否 制造商:Altera Corporation 存儲(chǔ)類(lèi)型:Flash 存儲(chǔ)容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
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