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參數(shù)資料
| 型號： | AT17LV040-10JI |
| 廠商： | ATMEL CORP |
| 元件分類： | DRAM |
| 英文描述： | FPGA Configuration EEPROM Memory |
| 中文描述： | 4M X 1 CONFIGURATION MEMORY, PQCC44 |
| 封裝： | PLASTIC, MS-018AC, LCC-44 |
| 文件頁數(shù)： | 23/24頁 |
| 文件大?。?/td> | 221K |
| 代理商： | AT17LV040-10JI |
23
AT17LV65/128/256/512/010/002/040
2321E–CNFG–06/03
44J – PLCC
Notes:
1. This package conforms to JEDEC reference MS-018, Variation AC.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254 mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
3. Lead coplanarity is 0.004" (0.102 mm) maximum.
A
4.191
–
4.572
A1
2.286
–
3.048
A2
0.508
–
–
D
17.399
–
17.653
D1
16.510
–
16.662
Note 2
E
17.399
–
17.653
E1
16.510
–
16.662
Note 2
D2/E2
14.986
–
16.002
B
0.660
–
0.813
B1
0.330
–
0.533
e
1.270 TYP
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
MIN
NOM
MAX
NOTE
1.14(0.045) X 45
PIN NO. 1
IDENTIFIER
1.14(0.045) X 45
0.51(0.020)MAX
45 MAX (3X)
0.318(0.0125)
0.191(0.0075)
A2
A
A1
B1
D2/E2
B
e
E1
E
D1
D
44J
, 44-lead, Plastic J-leaded Chip Carrier (PLCC)
B
44J
10/04/01
2325 Orchard Parkway
San Jose, CA 95131
TITLE
DRAWING NO.
R
REV.
相關PDF資料 |
PDF描述 |
|---|---|
| AT17LV040-10NC | FPGA Configuration EEPROM Memory |
| AT17LV040-10NI | FPGA Configuration EEPROM Memory |
| AT17LV040-10PC | FPGA Configuration EEPROM Memory |
| AT17LV040-10PI | FPGA Configuration EEPROM Memory |
| AT17LV040-10SC | FPGA Configuration EEPROM Memory |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AT17LV040-10NC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV040-10NI | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV040-10PC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV040-10PI | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV040-10SC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
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