參數(shù)資料
型號: ASM805LEPA
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: 電源管理
英文描述: UP Power Supply Supervisor With Battery Backup Switch
中文描述: 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDIP8
封裝: PLASTIC, DIP-8
文件頁數(shù): 6/13頁
文件大?。?/td> 323K
代理商: ASM805LEPA
6 of 13
Notice: The information in this document is subject to change without notice
ASM690A / 692A
ASM802L / 802M
ASM805L
μP Power Supply Supervisor With Battery Backup Switch
rev 1.0
October 2003
Operation without a Backup Power Source
When operating without a back-up power source, the V
BATT
pin should be connected to GND and V
OUT
should be
connected to V
CC
, since power source switchover will not
occur. Connecting V
OUT
to V
CC
eliminates the voltage drop
due to the ON-resistance of the PMOS switch.
Power-Fail Comparator
The Power Fail feature is an independent voltage monitoring
function that can be used for any number of monitoring
activities. The PFI function can provide an early sensing of
power supply failure by sensing the voltage of the
unregulated DC ahead of the regulated supply sensing seen
by the backup-battery switchover circuitry. The PFI pin is
compared to a 1.25V internal reference. If the voltage at the
PFI pin is less than this reference voltage, the PFO pin goes
low. By sensing the voltage of the raw DC power supply, the
microprocessor system can prepare for imminent power-loss,
especially if the battery backup supply is not enabled. The
input voltage at the PFI pin results from a simple resistor
voltage divider as shown in Figure 6.
Power Fail Hysteresis
A noise margin can be added to the simple monitoring circuit
of
Figure 6
by adding positive feedback from the PFO pin.
The circuit of
Figure 7
adds this positive “l(fā)atching” effect by
means of an additional resistor R3 connected between PFO
and PFI which helps in pulling PFI in the direction of PFO and
eliminating an indecision at the trip point. Resistor R3 is
normally about 10 times higher in resistance than R2 to keep
the hysteresis band reasonable and should be larger than
10k
to avoid excessive loading on the PFO pin. The
calculations for the correct values of resistors to set the
hysteresis thresholds are given in
Figure 7
. A capacitor can
be added to offer additional noise rejection by low-pass
filtering.
V
CC
PFI
PFO
GND
R1
R2
ASM690A
ASM692A
ASM802L
ASM802M
ASM805L
A
B
+5V
PFO
0V
A
5
R
1
R
2
+
R
1.25
V
<
=
B
5
R
1
R
2
+
R
1.25
V
>
=
Figure 6: Simple Voltage divider sets PFI trip point
+5V
V
IN
V
CC
PFI
PFO
GND
+5V
R
3
R
2
R
1
V
IN
To μP
ASM690A
ASM692A
ASM802L
ASM802M
ASM805L
C1*
* Optional
+5V
PFO
0V
0V
V
L
V
H
V
TRIP
Figure 7: Hysterisis Added To PFI Pin
V
TRIP
2
R
2
+
R
--------R
=
V
H
R
2
+
3
||
R
1
R
3
------------------R
--------R
=
V
--------–
1.25
R
1
5
1.25
R
3
+
R
2
1.25
=
相關PDF資料
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