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參數(shù)資料
| 型號(hào)： | ASM802LCSA |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封裝： | 0.150 INCH, SOIC-8 |
| 文件頁(yè)數(shù)： | 8/15頁(yè) |
| 文件大?。?/td> | 549K |
| 代理商： | ASM802LCSA |
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ASM690A/692A and ASM802L/802M and ASM805L
Rev. 2 | Page 2 of 15 | www.onsemi.com
Pin Configuration
Pin Description
Pin Number
Name
Function
ASM690A/
ASM692A
ASM802L/
ASM802M
ASM805L
1
VOUT
Voltage supply for RAM. When VCC is above the reset threshold, VOUT
connects to VCC through a P-Channel MOS device. If VCC falls below the
reset threshold, this output will be connected to the backup supply at VBATT
(or VCC, whichever is higher) through the MOS switch to provide continuous
power to the CMOS RAM.
2
VCC
+5V power supply input.
3
GND
Ground.
4
PFI
Power failure monitor input. PFI is connected to the internal power fail
comparator which is referenced to 1.25V. The power fail output (PFO) is
active LOW but remains HIGH if PFI is above 1.25V. If this feature is
unused, the PFI pin should be connected to GND or VOUT.
5
PFO
Power-fail output. PFO is active LOW whenever the PFI pin is less than
1.25V.
6
WDI
Watchdog input. The WDI input monitors microprocessor activity. An internal
timer is reset with each transition of the WDI input. If the WDI is held HIGH
or LOW for longer than the watchdog timeout period, typically 1.6 seconds,
RESET (or RESET) is asserted for the reset pulse width time, tRS, of
140ms, minimum.
7
-
RESET
Active-LOW reset output. When triggered by VCC falling below the reset
threshold or by watchdog timer timeout, RESET pulses low for the reset
pulse width tRS, typically 200ms. It will remain low if VCC is below the reset
threshold (4.65V in ASM690A / ASM802L and 4.4V in the ASM692A /
ASM802L) and remains low for 200ms after VCC rises above the reset
threshold.
-
7
RESET
Active-HIGH reset output. The inverse of RESET.
8
VBATT
Auxiliary power or backup-battery input. VBATT should be connected to GND
if the function is not used. The input has about 40mV of hysteresis to
prevent rapid toggling between VCC and VBATT.
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