- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄381388 > ASM708CUAF-T (ALLIANCE SEMICONDUCTOR CORP) Low Power uP Supervisor Circuits PDF資料下載
參數(shù)資料
| 型號： | ASM708CUAF-T |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Low Power uP Supervisor Circuits |
| 中文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封裝： | LEAD FREE, MICRO, SOP-8 |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 274K |
| 代理商： | ASM708CUAF-T |
HIGH & LOW
5 of 16
Notice: The information in this document is subject to change without notice
3/3.3/4.0 V μP Supervisor Circuits
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
Detailed Descriptions
A
microcontroller to start in a known state. ASM706 P/ R/ S/ T/
J and ASM708 R/ S/ T/ J assert reset to prevent code
execution errors during power-up, power-down and brown-
out conditions.
proper
reset
input
enables
a
microprocessor/
RESET/RESET Operation
The RESET/RESET signals are designed to start or return a
μ
P/
μ
C to a known state.
With V
CC
above 1.2V, RESET and RESET are guaranteed to
be asserted. During a power-up sequence, the reset outputs
remain asserted until the supply rises above the threshold
level. The resets are deasserted approximately 200ms after
crossing the threshold.
In a brownout situation where V
CC
falls below the threshold
level, the reset outputs are asserted. If a brownout occurs
during an already initiated reset period, the reset period will
extend for an additional reset period of 200ms.
The ASM708 devices have dual reset outputs, one active
LOW and one active HIGH. The ASM706P has a single
active HIGH reset and the ASM706/R/S/T/J devices have an
active LOW reset output.
Manual Reset (MR)
The active-LOW manual reset input is pulled high by an
internal 20k
pull-up resistor and can be driven low by
CMOS/TTL logic or a mechanical switch to ground. An
external debounce circuit is
unnecessary since the 140ms minimum reset time will
debounce mechanical pushbutton switches. The minimum
MR input pulse width is 0.5
μ
s with a 3V V
CC
input and 0.15
μ
s
with a 5V V
CC
input. If not used, tie MR to V
CC
or leave
floating.
By connecting the watchdog output (WDO) and MR, a
watchdog timeout forces a RESET to be generated.
Watchdog Timer
A watchdog timer available on the ASM706P/R/S/T/J
monitors
μ
P/
μ
C activity. An output line on the processor is
used to toggle the WDI line. If the line is not toggled within 1.6
seconds on the Watchdog Input (WDI), the internal timer puts
the Watchdog Output (WDO) into a LOW state. WDO will
remain LOW until a toggle is detected at WDI.
The watchdog function is disabled, meaning it is cleared and
not counting, if WDI is floated or connected to a three-stated
circuit. The watchdog timer is also disabled if RESET is
asserted. When RESET becomes inactive and the WDI input
sees a high or low transition as short as 100ns (V
CC
= 2.7V)/
Alliance
Part #
RESET
Polarity
Threshold
Watchdog
Timer
ASM706P
HIGH
2.63V
YES
ASM706R
LOW
2.63V
YES
ASM706S
LOW
2.93V
YES
ASM706T
LOW
3.08V
YES
ASM706J
LOW
4.00V
YES
ASM708R
2.63V
NO
ASM708S
HIGH & LOW
2.93V
NO
ASM708T
HIGH & LOW
3.08V
NO
ASM708J
HIGH & LOW
4.00V
NO
Figure 1: WDI Three-state operation
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ASM708JCPA | 3/3.3/4.0 V uP Supervisor Circuits |
| ASM706PCUA | 3/3.3/4.0 V uP Supervisor Circuits |
| ASM706CUA-T | Low Power uP Supervisor Circuits |
| ASM706CUAF | Low Power uP Supervisor Circuits |
| ASM706CUAF-T | Low Power uP Supervisor Circuits |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ASM708CUA-T | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Power uP Supervisor Circuits |
| ASM708EPA | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:Low Power μP Supervisor Circuits |
| ASM708EPAF | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:Low Power μP Supervisor Circuits |
| ASM708EPAF-T | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Power uP Supervisor Circuits |
| ASM708EPA-T | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Power uP Supervisor Circuits |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。