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參數(shù)資料
| 型號： | ASM5I2304BG-1H-08-ST |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 3.3V Zero Delay Buffer |
| 中文描述： | 2304 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| 封裝： | 0.150 INCH, GREEN, SOIC-8 |
| 文件頁數(shù)： | 3/13頁 |
| 文件大?。?/td> | 376K |
| 代理商： | ASM5I2304BG-1H-08-ST |
September 2005
rev 0.5
Pin Configuration
Pin Description for ASM5P2304B
ASM5P2304B
3.3V Zero Delay Buffer
3 of 13
Notice: The information in this document is subject to change without notice.
CLKB1
1
2
3
4
5
6
7
8
ASM5P2304B
REF
CLKA1
CLKA2
GND
CLKB2
V
DD
FBK
Pin #
Pin Name
Description
1
REF
1
Input reference frequency, 5V tolerant input
2
CLKA1
2
Buffered clock output, bank A
3
CLKA2
2
Buffered clock output, bank A
4
GND
Ground
5
CLKB1
2
Buffered clock output, bank B
6
CLKB2
2
Buffered clock output, bank B
7
V
DD
3.3V supply
8
FBK
PLL feedback input
Notes:
1. Weak pull-down.
2. Weak pull-down on all outputs.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ASM5P2304BG-2-08-SR | 3.3V Zero Delay Buffer |
| ASM5I2304BG-2-08-SR | 3.3V Zero Delay Buffer |
| ASM5P2304BG-2-08-ST | Miniature toggle switches come in up to 4 poles with a variety of switching functions |
| ASM5I2304BG-2-08-ST | 3.3V Zero Delay Buffer |
| ASM5P2304BG-2H-08-ST | 3.3V Zero Delay Buffer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ASM5I2304BG-2-08-SR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V Zero Delay Buffer |
| ASM5I2304BG-2-08-ST | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V Zero Delay Buffer |
| ASM5I2304BG-2H-08-SR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V Zero Delay Buffer |
| ASM5I2304BG-2H-08-ST | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V Zero Delay Buffer |
| ASM5I2305A-1-08-SR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V Zero Delay Buffer |
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