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參數(shù)資料
| 型號： | ASM3P2762A |
| 廠商： | Alliance Semiconductor Corporation |
| 英文描述： | Low Power Peak EMI Reducing Solution |
| 中文描述： | 低功耗降低峰值電磁干擾解決方案 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 180K |
| 代理商： | ASM3P2762A |
September 2005
rev 1.6
ASM3P2762A
Alliance Semiconductor
2575 Augustine Drive
Santa Clara, CA
Tel: 408.855.4900
Fax: 408.855.4999
www.alsc.com
Notice: The information in this document is subject to change without notice.
Low Power Peak EMI Reducing Solution
Features
Generates an EMI optimized clock signal at the
output.
Integrated loop filter components.
Operates with a 3.3V /2.5V Supply.
Operating current less than 6mA.
Low power CMOS design.
Input frequency range: 6MHz to 12MHz for 2.5V
: 6MHz to 13MHz for 3.3V
Generates a 1X low EMI spread spectrum clock of
the input frequency.
Frequency deviation: -1.25% (Typ) @ 10MHz Input
Frequency
Available in 6-pin TSOT-23, 8-pin SOIC and 8-pin
TSSOP packages.
Product Description
The ASM3P2762A is a versatile spread spectrum
frequency modulator designed specifically for a wide
range of clock frequencies. The ASM3P2762A reduces
electromagnetic interference (EMI) at the clock source,
allowing system wide reduction of EMI of all clock
dependent signals. The ASM3P2762A allows significant
system cost savings by reducing the number of circuit
board layers ferrite beads, shielding that are traditionally
required to pass EMI regulations.
The ASM3P2762A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all digital method.
The ASM3P2762A modulates the output of a single PLL
in order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
Applications
The ASM3P2762A is targeted towards all portable
devices with very low power requirements like MP3
players and digital still cameras.
Key Specifications
Description
Specification
Supply voltages
V
DD
= 3.3V /2.5V
Cycle-to-Cycle Jitter
200pS (Max)
Output Duty Cycle
45/55%
Modulation Rate Equation
F
IN
/256
Frequency Deviation
-1.25% (Typ) @ 10MHz
Block Diagram
V
SS
XIN
ModOUT
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
VCO
Output
Divider
PLL
V
DD
PD
Crystal
Oscillator
XOUT
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| ASM3P2762A-06OR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Power Peak EMI Reducing Solution |
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| ASM3P2762A-08TR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Power Peak EMI Reducing Solution |
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