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參數(shù)資料
| 型號： | ASM3P2508A |
| 廠商： | Alliance Semiconductor Corporation |
| 英文描述： | Peak EMI Reducing Solution |
| 中文描述： | 降低峰值電磁干擾解決方案 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 3709K |
| 代理商： | ASM3P2508A |
Alliance Semiconductor
2575 Augustine Drive
Santa Clara CA
Tel: 408-855-4900
Fax: 408-855-4999
www.alsc.com
rev 1.3
February 2005
ASM3P2508A
Peak EMI Reducing Solution
Features
Generates an EMI optimized clocking signal at
output.
Input frequency –14.31818 MHz.
Frequency outputs:
120 MHz (modulated) - default.
72 MHz (modulated) or 48 MHz
(modulated) selectable via I2C
± 1% Centre spread.
Modulation rate: 40 KHz.
Byte Write via I2C
Supply voltage range 3.3V ± 0.3V.
Available in 8-pin SOIC Package.
Available
in
Commercial
Temperature ranges.
o
o
and
Industrial
Product Description
The ASM3P2508A is a versatile spread spectrum
frequency
modulator.
The
electromagnetic interference (EMI) at the clock source.
ASM3P2508A
reduces
The ASM3P2508A allows significant system cost savings
by reducing the number of circuit board layers and
shielding that are required to pass EMI regulations. The
ASM3P2508A modulates the output of PLL in order to
spread the bandwidth of a synthesized clock, thereby
decreasing the peak amplitudes of its harmonics. This
results in significantly lower system EMI compared to the
typical narrow band signal produced by oscillators and
most clock generators. Lowering EMI by increasing a
signal’ bandwidth is called spread spectrum clock
generation.
The ASM3P2508A has a feature to power down the
72MHz/48MHz output by writing data into specific
registers in the device via I2C. By writing a ‘’nto bit 1 of
Byte 0, the PLL block generating 72 MHz / 48MHz can be
powered down. Writing ‘’nto bit ‘’of Byte 1 selects an
output of 72 MHz on FOUT2CLK while a ‘’at the same
location selects a 48 MHz clock output. However, the I2C
block, crystal oscillator, and the PLL block generating
120MHz would be always running.
Block Diagram
FOUT2CLK
(72 MHz / 48 MHz)
SDA
Crystal
Oscillator
PLL 1
SCL
XIN
XOUT
V
SS
V
DD
FOUT1CLK
(120 MHz)
I2C
Interface
PLL 2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ASM3P2508AF-08-SR | Peak EMI Reducing Solution |
| ASM3P2508AF-08-ST | Peak EMI Reducing Solution |
| ASM3P2508SP-08SR | Clock Synthesizer and Frequency Generator with Peak EMI reduction |
| ASM3P2508SP-08ST | Clock Synthesizer and Frequency Generator with Peak EMI reduction |
| ASM3P2508SPF-08ST | Clock Synthesizer and Frequency Generator with Peak EMI reduction |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ASM3P2508A-08-SR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Peak EMI Reducing Solution |
| ASM3P2508A-08-ST | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Peak EMI Reducing Solution |
| ASM3P2508AF-08SR | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:Peak EMI Reducing Solution |
| ASM3P2508AF-08-SR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Peak EMI Reducing Solution |
| ASM3P2508AF-08ST | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:Peak EMI Reducing Solution |
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