參數(shù)資料
型號(hào): ASM3I2870AG-08SR
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: Low Power Peak EMI Reducing Solution
中文描述: 30 MHz, OTHER CLOCK GENERATOR, PDSO8
封裝: GREEN, SOIC-8
文件頁數(shù): 3/12頁
文件大?。?/td> 179K
代理商: ASM3I2870AG-08SR
September 2005
rev 1.5
Pin Configuration (8-pin SOIC and TSSOP Packages)
Pin Description
Pin#
Pin Name
Type
ASM3P2870A
Low Power Peak EMI Reducing Solution
3 of 12
Notice: The information in this document is subject to change without notice.
V
SS
ModOUT
XIN / CLKIN
NC
XOUT
1
2
3
4
5
6
7
8
ASM3P2870A
REFOUT
NC
V
DD
Description
1
XIN/CLKIN
I
Crystal connection or external reference frequency input. This pin has dual functions. It
can be connected either to an external crystal or an external reference clock.
Crystal connection. If using an external reference, this pin must be left unconnected.
2
XOUT
O
3
REFOUT
O
Buffered output of the input frequency
4
NC
-
No connect.
5
V
SS
P
Ground connection.
6
ModOUT
O
Spread spectrum clock output.
7
NC
-
No connect.
8
V
DD
P
Power supply for the entire chip.
Modulation Profile
Specifications
Description
Specification
13MHz < CLKIN < 30MHz
For 2.5V Supply
For 3.3V Supply
Frequency Range
Modulation Equation
F
IN
/640
Frequency Deviation
+0.75%(Typ) @22MHz
相關(guān)PDF資料
PDF描述
ASM3P2870AG-08ST Low Power Peak EMI Reducing Solution
ASM3I2870AG-08ST RIBBON CABLE, RND/FLAT, 9WAY, PER M; Cores, No. of:9; Conductor make-up:7/36AWG; Impedance:75R; Pitch:1.27mm; Voltage rating, AC:300V; Colour:Grey; Approval Bodies:UL, CSA; Area, conductor CSA:0.072mm2; Cable UL style number:UL CL2; RoHS Compliant: Yes
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