參數(shù)資料
型號(hào): ASM3I2508SP-08SR
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類(lèi): XO, clock
英文描述: Clock Synthesizer and Frequency Generator with Peak EMI reduction
中文描述: 33.33 MHz, OTHER CLOCK GENERATOR, PDSO8
封裝: 0.150 INCH, SOIC-8
文件頁(yè)數(shù): 2/7頁(yè)
文件大?。?/td> 303K
代理商: ASM3I2508SP-08SR
February 2005
rev 0.4
Pin Configuration
Pin Description
Pin#
ASM3P2508SP
Clock Synthesizer and Frequency Generator with Peak EMI reduction
2 of 7
Notice: The information in this document is subject to change without notice.
PWRDNB
XOUT
1
2
3
4
5
6
7
8
ASM3P2508SP
XIN/CLKIN
Sys_REF_CLK
PCI_CLK
V
SS
T1_CLK
V
DD
Pin Name
Type
Description
1
XIN/CLKIN
I
Crystal connection or external reference frequency input. This pin has dual functions.
It can be connected either to an external crystal or an external reference clock.
Crystal connection. If using an external reference, this pin must be left unconnected.
2
XOUT
O
3
V
DD
P
Power supply for the entire chip
4
Sys_REF_CLK
O
PLL 1 output System Reference Clock @ 20MHz
Power-down control pin. Pull low to enable power-down mode. Connect to V
DD
if not
used. Power -down Mode shuts off all the Outputs.
PLL 2 Spread spectrum clock output @ 33.33MHz
5
PWRDNB
I
6
PCI_CLK
O
7
V
SS
P
Ground to entire chip. Connect to system ground
8
T1_CLK
O
Reference output T1 Clock @ 25MHz
Typical Modulation Profile
Absolute Maximum Ratings
Symbol
Parameter
Rating
Unit
V
DD
, V
IN
Voltage on any pin with respect to Ground
-0.5 to +7.0
V
T
STG
Storage temperature
-65 to +125
°C
T
A
Operating temperature
0 to 70
°C
T
s
Max. Soldering Temperature (10 sec)
260
°C
T
J
Junction Temperature
150
°C
T
DV
Static Discharge Voltage
(As per JEDEC STD 22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
2
KV
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