參數(shù)資料
型號: ASM3I1819FTR
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: 時鐘產(chǎn)生/分配
英文描述: 40 MHz, OTHER CLOCK GENERATOR, PDSO8
封裝: TSSOP-8
文件頁數(shù): 4/8頁
文件大?。?/td> 253K
代理商: ASM3I1819FTR
Low EMI Clock for Mobile VGA
4 of 8
Octoberr 2003
ASM3P1819A-H
rev 1.0
Notice: The information in this document is subject to change without notice.
DC Electrical Characteristics
Unless otherwise noted, VDD = 3.3V and TA =25°C
Symbol
Parameter
Min
Typ
Max
Unit
VIL
Input low voltage
GND – 0.3
-
0.8
V
VIH
Input high voltage
2.00
-
VDD + 0.3
V
IIL
Input low current (inputs D_C, PD#)
-60.0
-
-20.0
A
IIH
Input high current
-
1.00
A
IXOL
XOUT output low current (@ 0.4V, VDD = 3.3V)
2.00
-
12.00
mA
IXOH
XOUT output high current (@2.5V, VDD = 3.3V)
-
12.00
mA
VOL
Output low voltage (VDD = 3.3V, IOL = 20mA)
-
0.4
V
VOH
Output high voltage (VDD = 3.3V, IOH = 20mA)
2.8
-
V
ICC
Dynamic supply current normal mode (3.3V and
10pF loading)
7.1 fIN - min
-
26.9 fIN - max
mA
IDD
Static supply current standby mode
-
4.5
-
mA
VDD
Operating voltage
-
3.3
-
V
tON
Power up time (first locked clock cycle after power
up)
-
0.18
-
mS
ZOUT
Clock output impedance
-
50
-
AC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max Unit
fIN
Input frequency
20
-
40
MHz
fOUT
Output frequency
20
-
40
MHz
tLH*
Output rise time (measured at 0.8V to 2.0V)
-
0.69
-
ns
tHL*
Output fall time (measured at 2.0V to 0.8V)
-
0.66
-
ns
tJC
Jitter (cycle to cycle)
-200
-
200
ps
tD
Output duty cycle
45
50
55
%
* tLH and tHL are measured into a capacitive load of 15pF
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