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參數(shù)資料
| 型號(hào)： | ASM2P3805DG-20-AT |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 3.3V CMOS Dual 1-To-5 Clock Driver |
| 中文描述： | 3805 SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 封裝： | 0.150 INCH, GREEN, SSOP-20 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 500K |
| 代理商： | ASM2P3805DG-20-AT |
June 2005
rev 0.2
ASM2P3805X
Alliance Semiconductor
2575, Augustine Drive
Santa Clara, CA
Tel: 408.855.4900
Fax: 408.855.4999
www.alsc.com
Notice: The information in this document is subject to change without notice.
3.3V CMOS Dual 1-To-5 Clock Driver
Features
Where X =D for 133MHz Operation
X =E for 166MHz Operation
"Heartbeat" monitor output
V
CC
= 3.3V ± 0.3V
Available in SSOP and QSOP Packages
Advanced CMOS Technology
Guaranteed low skew < 200pS (max)
Very low propagation delay < 2.5nS (max)
Very low duty cycle distortion < 270pS (max)
Very low CMOS power levels
Operating frequency up to 166MHz
TTL compatible inputs and outputs
Inputs can be driven from 3.3V or 5V components
Two independent output banks with 3-state control
1:5 fanout per bank
ASM2P3805X
Block Diagram
Functional Description
The ASM2P3805X is a 3.3V clock driver built using
advanced CMOS technology. The device consists of two
banks of drivers, each with a 1:5 fanout and its own output
enable control. The device has a "heartbeat" monitor for
diagnostics and PLL driving. The MON output is identical to
all other outputs and complies with the output specifications
in this document. The ASM2P3805X offers low capacitance
inputs. The ASM2P3805X is designed for high speed clock
distribution where signal quality and skew are critical. The
ASM2P3805X also allows single point-to-point transmission
line driving in applications such as address distribution,
where one signal must be distributed to multiple receivers
with low skew and high signal quality.
Pin Diagram
OB
1
– OB
5
IN
A
IN
B
OE
B
OE
A
OA
1
– OA
5
MON
5
5
5
V
CCB
OB
1
OB
2
OB
3
GND
B
OB
4
OB
5
MON
OE
B
IN
B
IN
A
OE
A
GND
Q
OA
5
OA
4
GND
A
OA
3
OA
2
OA
1
V
CCA
10 11
9 12
8 13
7 14
6 15
5 16
4 17
3 18
2 19
1 20
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ASM2P3805DG-20-DR | 3.3V CMOS Dual 1-To-5 Clock Driver |
| ASM2P3805DG-20-DT | 3.3V CMOS Dual 1-To-5 Clock Driver |
| ASM2P3805EG-20-AR | 3.3V CMOS Dual 1-To-5 Clock Driver |
| ASM2P3805EG-20-AT | 3.3V CMOS Dual 1-To-5 Clock Driver |
| ASM2P3805EG-20-DR | 3.3V CMOS Dual 1-To-5 Clock Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ASM2P3805DG-20-DR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V CMOS Dual 1-To-5 Clock Driver |
| ASM2P3805DG-20-DT | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V CMOS Dual 1-To-5 Clock Driver |
| ASM2P3805EG-20-AR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V CMOS Dual 1-To-5 Clock Driver |
| ASM2P3805EG-20-AT | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V CMOS Dual 1-To-5 Clock Driver |
| ASM2P3805EG-20-DR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V CMOS Dual 1-To-5 Clock Driver |
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