參數(shù)資料
型號(hào): ASM2P20805A-20-DT
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: 時(shí)鐘及定時(shí)
英文描述: GS-GSK
中文描述: 20805 SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
封裝: QSOP-20
文件頁數(shù): 6/11頁
文件大?。?/td> 486K
代理商: ASM2P20805A-20-DT
June 2005
rev 0.2
ASM2P20805A
2.5V CMOS Dual 1-To-5 Clock Driver
6 of 11
Notice: The information in this document is subject to change without notice.
Test Circuits and Waveforms
Switch Position
Test Conditions
Symbol
V
CC
= 2.5V ±0.2V
Unit
C
L
R
T
15
pF
Z
OUT
of pulse generator
R
L
33
t
R
/ t
F
1 (0V to 2.5V or 2.5V to 0V)
nS
Definitions
:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to
Z
OUT
of the Pulse
Generator.
t
R
/ t
F
= Rise/Fall time of the input stimulus from the Pulse Generator.
Test
Switch
Disable Low
Enable Low
4.6V
Disable High
Enable High
GND
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