參數(shù)資料
型號: ASM1834UF
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: 電源管理
英文描述: Dual 5V and 3.3V uP Power Supply Supervisor with Manual Reset
中文描述: 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
封裝: LEAD FREE, MICRO, SO-8
文件頁數(shù): 2/10頁
文件大小: 256K
代理商: ASM1834UF
GND
Ground.
ASM1834/A/D
2 of 10
Notice: The information in this document is subject to change without notice
Dual 5V and 3.3V μP Power Supply Supervisor with Manual Reset
rev 1.3
Block Diagram
April 2005
Pin Configuration
Pin Description
Pin #
Pin Name
Function
1
5V
IN
5V power supply input.
2
5V RESET
5V RESET
5V reset output (Active LOW, ASM1834, ASM1834A. Open drain outputs for ASM1834A).
5V reset output (Active HIGH, AS1834D).
3
5V TOL
5V input tolerance select: 10% tolerance for 5VTOL= 5V
IN
and 5% tolerance for 5VTOL = GND
4
5
PBRST
Debounced manual pushbutton reset input (40k
internal pull-up).
6
3.3V TOL
3.3V input tolerance select: 20% tolerance for 3.3VTOL = 3.3V
IN
and 10% tolerance for 3.3VTOL=GND.
7
3.3V RESET
3.3V RESET
3.3V reset output (Active LOW, ASM1834, ASM1834A. Open drain outputs for ASM1834A).
3.3V reset output (Active HIGH, AS1834D).
8
3.3V
IN
3.3V power supply input.
1
2
3
4
5
6
7
8
5V
IN
5V RESET *
5V TOL
GND
3.3V
IN
3.3V RESET *
PBRST
3.3V TOL
ASM1834
ASM1834A
ASM1834D
* AS1834D reset outputs are active HIGH (5V RESET and 3.3V RESET)
Outputs are open-drain for AS1834A.
Sense and Debounce
5V Tolerance
Bias
Low TC
Reference
3.3V Tolerance
Bias
Pushbutton Level
For ASM1834D
350ms Delay
5 V
IN
5 VTOL
PBRST
3.3 V
IN
3.3 VTOL
GND
3.3V RESET
3.3V RESET (ASM1834D)
5V RESET
(5V RESET
ASM1834
350ms Delay
For ASM1834D
-
+
-
ASM1834A
5V RESET
3.3V RESET
40k
+
1
3
5
8
6
4
7
2
2
7
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