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參數(shù)資料
| 型號： | ASM161 |
| 廠商： | Alliance Semiconductor Corporation |
| 英文描述： | uP Supervisory Circuit |
| 中文描述： | 的監(jiān)控電路 |
| 文件頁數(shù)： | 3/9頁 |
| 文件大?。?/td> | 245K |
| 代理商： | ASM161 |
3 of 9
Notice: The information in this document is subject to change without notice
μP Supervisory Circuit
ASM161 / ASM162
rev 1.0
October 2003
Detailed Descriptions
The reset function ensures the microprocessor is properly
reset and powers up into a known condition after a power
failure.
Reset Timing
A reset is generated whenever the supply voltage is below
the threshold level (V
CC
< V
TH
). The reset duration is at least
800ms after V
CC
has risen above the reset threshold and is
guaranteed to be no more than 2 seconds. The rest signal
remains active as long as the monitored supply voltage is
below the internal threshold voltage.
The ASM161 has an open-drain, active LOW RESET output
(which is guaranteed to be in the correct state for V
CC
down
to 1.1 V). The ASM161 uses an external pull-up resistor.
Output leakage current is under 1μA. A high resistance value
can be used to minimize current drain.
The ASM162 generates an active-HIGH RESET output.
Manual Reset
The ASM161/162 have a unique manual reset circuit. A
negative going edge transition on MR initiates the reset. A
manual reset generates a single reset pulse of fixed length.
The output-reset pulse remains asserted for the Reset Active
Time-Out Period t
RP
and then clears. Once the reset pulse is
completed, the MR input remains disabled for at least 49μS
but not more than 122μS. This period is specified as t
MRD
.
During the MR disabled period, the microcontroller is
guaranteed a time period free of new manual reset signals.
This period can be used to refresh critical DRAM contents or
other system tasks.
The MR pin must be taken HIGH and LOW again after the
t
MRD
period has been completed to initiate another reset
pulse.
The manual reset input has an internal 20k
pull-up resistor.
MR can be left open if not used.
Application Information
Glitch Resistance
The ASM161/162 are relatively immune to short duration
negative-going V
CC
transients/glitches. A V
CC
transient that
goes 100mV below the reset threshold and lasts 20s or less
will not typically cause a reset pulse.
Valid Reset with V
CC
under 1.1V
To ensure that logic inputs connected to the ASM162 RESET
pin are in a known state when V
CC
is under 1.1V, a 100k
pull-down resistor at RESET is needed. The value is not
critical.
This scheme does not work with the open-drain outputs of
ASM161.
Part Number
Reset Polarity
ASM161
LOW (use external pull-up resistor)
ASM162
HIGH
MR input is blocked
Ready
for
MR
Reset
Time-Out
*Second and following edges ignored
Figure 1: Manual Reset Timing
*........
next
Triggering
Pulse
t
MD
t
MRD
RESET
MR
V
CC
Power Supply
ASM162
RESET
GND
MR
Figure 2:
RESET valid with VCC under 1.1V
100K
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ASM161JCUS/T | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:uP Supervisory Circuit |
| ASM161JCUSF/T | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:μP Supervisory Circuit |
| ASM161JEUS/T | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:μP Supervisory Circuit |
| ASM161JEUSF/T | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:μP Supervisory Circuit |
| ASM161LCUS/T | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:μP Supervisory Circuit |
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