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| 型號(hào)： | AS91L1002S40L100I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | The AS91L1006BU is a one to 6-port JTAG gateway |
| 中文描述： | 該AS91L1006BU是一個(gè)6口的JTAG網(wǎng)關(guān) |
| 文件頁(yè)數(shù)： | 16/28頁(yè) |
| 文件大?。?/td> | 415K |
| 代理商： | AS91L1002S40L100I |
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July 2004
AS91L1006BU
PIN NAME
PIN
TYPE
PIN
NUMBER
LQFP
67
PIN
NUMBER
FPBGA
E8
DESCRIPTION
Stable state
after port/reset
LSP5_TDO
OUT
IEEE1149.1 Test Data Out on LSP 5
when PASS_THRU_ENABLE is
HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 100.
This pin is tri-stated for all other
combinations.
IEEE1149.1 Test Data In on LSP 5
when PASS_THRU_ENABLE is
HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 100.
IEEE1149.1 Test Reset on LSP 5
when PASS_THRU_ENABLE is
HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 100.
This pin is tri-stated for all other
combinations.
Flash, Memory Auto-Write on LSP 5
when PASS_THRU_ENABLE is
HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 100;
PRIM_AutoWR is routed to output.
This pin is tri-stated for all other
combinations.
PASS_THRU Debug Enable Output
on LSP 5.
Active low output when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 100.
This pin is high for all other
combinations.
Logic '1'
LSP5_TDI
IN
68
E7
LSP5_TRST
OUT
72
C9
Buffered version
of signal present
on primary TRST
LSP5_AutoWR
OUT
71
D8
Logic '1'
LSP5_DE
75
C10
Logic '1'
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16
2003, 2004 Copyright Alliance Semconductor Corporation. All Rights reserved.
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