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參數(shù)資料
| 型號： | AS87C196CB |
| 英文描述： | 16-Bit Microcontroller |
| 中文描述： | 16位微控制器 |
| 文件頁數(shù)： | 11/36頁 |
| 文件大?。?/td> | 278K |
| 代理商： | AS87C196CB |
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Production Datasheet
7
87C196CB - Automotive
P5.5/BHE#/WRH#
Byte High Enable or Write High output, as selected by the CCR. BHE# = 0 selects the
bank of memory that is connected to the high byte of the data bus. A0 = 0 selects the
bank of memory that is connected to the low byte. Thus accesses to a 16-bit wide
memory can be to the low byte only (A0 = 0, BHE# = 1), to the high byte only (A0 = 1,
BHE# = 0) or both bytes (A0 = 0, BHE# = 0). If the WRH# function is selected, the pin
goes low if the bus cycle is writing to an odd memory location. BHE#/WRH# is only valid
during 16-bit external. Also an LSIO pin when not BHE/WRH#.
P5.4/SLPINT
Dual-function I/O pin. As a bidirectional port pin or as a system function. The system
function is a Slave Port Interrupt Output Pin.
P5.3/RD#
Read signal output to external memory. RD# is active only during external memory reads
or LSIO when not used as RD#.
P5.2/WR#/WRL#
Write and Write Low output to external memory, as selected by the CCR, WR# goes low
for every external write, while WRL# goes low only for external writes where an even
byte is being written. WR#/WRL# is active during external memory writes. Also an LSIO
pin when not used as WR#/WRL#.
P5.1/INST
Output high during an external memory read indicates the read is an instruction fetch.
INST is valid throughout the bus cycle. INST is active only during external memory
fetches, during internal EPROM fetches INST is held low. Also LSIO when not INST.
P5.0/ALE/ADV#
Address Latch Enable or Address Valid output, as selected by CCR. Both pin options
provide a latch to demultiplex the address from the address/data bus. When the pin is
ADV#, it goes inactive (high) at the end of the bus cycle. ADV# can be used as a chip
select for external memory. ALE/ADV# is active only during external memory accesses.
Also LSIO when not used as ALE.
PORT3 and 4
8-bit bidirectional I/O ports with open drain outputs. These pins are shared with the
multiplexed address/data bus which has strong internal pullups.
P2.7/CLKOUT
Output of the internal clock generator. The frequency is the oscillator frequency.
CLKOUT has a 50% duty cycle. Also LSIO pin when not used as CLKOUT.
P2.6/HLDA#
Bus Hold Acknowledge. Active-low output indicates that the bus controller has
relinquished control of the bus. Occurs in response to an external device asserting the
HLD# signal. Also LSIO when not used as HLDA#.
P2.5/HLD#
Bus Hold. Active-low signal indicates that an external device is requesting control of the
bus. Also LSIO when not used as HLD#.
P2.4/INTOUT#
Interrupt Output. This active-low output indicates that a pending interrupt requires use of
the external bus. Also LSIO when not used as INTOUT#.
P2.3/BREQ#
Bus Request. This active-low output signal is asserted during a HOLD cycle when the bus
controller has a pending external memory cycle. Also LSIO when not used as BREQ#.
P2.2/EXTINT
A positive transition on this pin causes a maskable interrupt vector through memory
location 203CH. Also LSIO when not used as EXTINT.
P2.1/RXD
Receive data input pin for the Serial I/O port. Also LSIO if not used as RXD.
P2.0/TXD
Transmit data output pin for the Serial I/O port. Also LSIO if not used as TXD.
PORT 1/EPA0–7
Dual-function I/O port pins. Primary function is that of bidirectional I/O. System function is
that of High Speed capture and compare. EPA0 and EPA2 have another function of
T2CLK and T2DIR of the TIMER2 timer/counter.
PORT 0/ACH0–7
8-bit high impedance input-only port. These pins can be used as digital inputs and/or as
analog inputs to the on-chip A/D converter. These pins are also used as inputs to
EPROM parts to select the Programming Mode.
EPORT
8-bit bidirectional standard and I/O Port. These bits are shared with the extended
address bus, A16–A19 for CB PLCC, A16–A23 for CB QFP. Pin function is selected on a
per pin basis.
TXCAN
Push-pull output to the CAN bus line.
RXCAN
High impedance input-only from the CAN bus line.
Table 2. Pin Descriptions (Sheet 2 of 2)
Name
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS87C196CB20 | 16-Bit Microcontroller |
| AS8E128K32PN-14 | x32 EEPROM Module |
| AS8E128K32Q-30 | x32 EEPROM Module |
| AS8E128K32P-30 | x32 EEPROM Module |
| AS7E128K32P-12 | x32 EEPROM Module |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS87C196CB20 | 制造商:Intel 功能描述: |
| AS87C196CB20F8 | 功能描述:IC MCU 16-BIT 5V 56K OTP 100-QFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:87C 其它有關(guān)文件:STM32F101T8 View All Specifications 特色產(chǎn)品:STM32 32-bit Cortex MCUs 標(biāo)準(zhǔn)包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C，IrDA，LIN，SPI，UART/USART 外圍設(shè)備:DMA，PDR，POR，PVD，PWM，溫度傳感器，WDT 輸入/輸出數(shù):26 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 10x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN，36-VFQFPN 包裝:托盤 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND |
| AS87C196EN | 制造商:Intel 功能描述: |
| AS87C196ENF8 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AS8846 | 制造商:AMSCO 制造商全稱:austriamicrosystems AG 功能描述:Programmable PWM DC Motor Driver / Controller |
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