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| 型號(hào)： | AS7C513B-12TC |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer Inverting and Non-Inverting 16-SOIC -55 to 125 |
| 中文描述： | 32K X 16 STANDARD SRAM, 12 ns, PDSO44 |
| 封裝： | 18.40 X 10.20 MM, TSOP2-44 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大小： | 213K |
| 代理商： | AS7C513B-12TC |
AS7C513B
3/26/04, v.1.3
Alliance Semiconductor
P. 6 of 9
Write waveform 2 (CE controlled)
11
AC test conditions
- Output load: see Figure B.
- Input pulse level: GND to 3.5V. See Figure A.
- Input rise and fall times: 2 ns. See Figure A.
- Input and output timing reference levels: 1.5V.
Notes
1
2
3
4
5
6
7
8
9
10 Not applicable.
11
All write cycle timings are referenced from the last valid address to the first transitioning address.
12 Not applicable.
13 C=30pF, except on High Z and Low Z parameters, where C=5pF.
During V
CC
power-up, a pull-up resistor to V
CC
on CE is required to meet I
SB
specification.
This parameter is sampled, but not 100% tested.
For test conditions, see
AC Test Conditions
, Figures A and B.
These parameters are specified with C
L
= 5pF, as in Figure B. Transition is measured
±
500mV from steady-state voltage.
This parameter is guaranteed, but not 100% tested.
WE is High for read cycle.
CE and OE are Low for read cycle.
Address valid prior to or coincident with CE transition Low.
All read cycle timings are referenced from the last valid address to the first transitioning address.
Address
CE
LB, UB
WE
Data IN
t
WC
t
CW
t
BW
t
WP
t
DW
t
DH
t
OW
t
WZ
t
AH
Data OUT
Data undefined
High-Z
High-Z
t
AS
t
AW
Data valid
t
CLZ
t
WR
&
255
C
13
480
D
out
GND
+5.0V
Figure B: 5.0V Output load
168
Thevenin equivalent:
D
out
+1.728V
10%
90%
10%
90%
GND
+3.5V
Figure A: Input pulse
2 ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS7C513B-12TI | High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer Inverting and Non-Inverting 16-SOIC -55 to 125 |
| AS7C513B-15JC | High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer Inverting and Non-Inverting 16-SOIC -55 to 125 |
| AS7C513B-15JI | High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer Inverting and Non-Inverting 16-SOIC -55 to 125 |
| AS7C513B-15TC | 5V 32K x 16 CMOS SRAM |
| AS7C513B-15TI | 5V 32K x 16 CMOS SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C513B-12TCN | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512K, 5V, 12ns, FAST 32K x 16 Asynch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C513B-12TCNTR | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512K, 5V, 12ns, FAST 32K x 16 Asynch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C513B-15JCN | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512K, 5v, 15ns, FAST 32K x 16 Asynch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C513B-15JCNTR | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512K, 5v, 15ns, FAST 32K x 16 Asynch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C513B-15TCN | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512K, 5v, 15ns, FAST 32K x 16 Asynch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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