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參數(shù)資料
| 型號(hào)： | AS7C513-15TC |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer with Address Latches 16-TSSOP -55 to 125 |
| 中文描述： | 32K X 16 STANDARD SRAM, 15 ns, PDSO44 |
| 封裝： | 18.40 X 10.20 MM, TSOP2-44 |
| 文件頁(yè)數(shù)： | 2/10頁(yè) |
| 文件大?。?/td> | 198K |
| 代理商： | AS7C513-15TC |
AS7C513
AS7C3513
3/23/01; v.1.0
Alliance Semiconductor
P. 2 of 10
Functional description
The AS7C513 and the AS7C3513 are high performance CMOS 524,288-bit Static Random Access Memory (SRAM) devices organized as
32,768 words × 16 bits. They are designed for memory applications where fast data access, low power, and simple interfacing are desired.
Equal address access and cycle times (t
AA
, t
RC
, t
WC
) of 12/15/20 ns with output enable access times (t
OE
) of 6,7,8 ns are ideal for high
performance applications. The chip enable input CE permits easy memory expansion with multiple-bank memory systems.
When CE is high, the devices enter standby mode. The AS7C513 and AS7C3513 are guaranteed not to exceed 28/18 mW power
consumption in CMOS standby mode. The devices also offer 2.0V data retention.
A write cycle is accomplished by asserting write enable (WE), (UB) and/or (LB), and chip enable (CE). Data on the input pins I/O0-I/O7,
and/or I/O8–I/O15, is written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices
should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).
A read cycle is accomplished by asserting output enable (OE), (UB) and (LB), and chip enable (CE), with write enable (WE) high. The chips
drive I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or write enable is
active, or (UB) and (LB), output drivers stay in high-impedance mode.
The devices provide multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be written and
read. LB controls the lower bits, I/O0–I/O7, and UB controls the higher bits, I/O8–I/O15.
All chip inputs and outputs are TTL-compatible. The AS7C513 and AS7C3513 are packaged in common industry standard packages.
Absolute maximum ratings
Parameter
NOTE: Stresses greater than those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect reliability.
Truth table
CE
Key: X = Don’t care; L = Low; H = High
Device
Symbol
Min
Max
Unit
Voltage on V
CC
relative to GND
AS7C513
V
t1
V
t1
V
t2
P
D
T
stg
T
bias
I
OUT
–0.50
+7.0
V
AS7C3513
–0.50
+5.0
V
Voltage on any pin relative to GND
–0.50
V
CC
+0.50
1.0
V
Power dissipation
–
W
o
C
o
C
Storage temperature (plastic)
–65
+150
Ambient temperature with V
CC
applied
DC current into outputs (low)
–55
+125
–
50
mA
WE
OE
LB
UB
I/O0–I/O7
I/O8–I/O15
Mode
H
X
X
X
X
High Z
High Z
Standby (I
SB
, I
SBI
)
Read I/O0–I/O7 (I
CC
)
Read I/O8–I/O15 (I
CC
)
Read I/O0–I/O15 (I
CC
)
Write I/O0–I/O15 (I
CC
)
Write I/O0–I/O7 (I
CC
)
Write I/O8–I/O15 (I
CC
)
L
H
L
L
H
D
OUT
High Z
High Z
L
H
L
H
L
D
OUT
D
OUT
D
IN
High Z
L
H
L
L
L
D
OUT
D
IN
D
IN
High Z
L
L
X
L
L
L
L
X
L
H
L
L
X
H
L
D
IN
L
L
H
X
H
X
X
H
X
H
High Z
High Z
Output disable (I
CC
)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS7C513-20 | High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer with Address Latches 16-TSSOP -55 to 125 |
| AS7C513-20JC | High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer with Address Latches 16-TSSOP -55 to 125 |
| AS7C513-20TC | High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer with Address Latches 16-TSSOP -55 to 125 |
| AS7C3513-20 | Octal Buffers/Drivers With 3-State Outputs 20-TSSOP -40 to 85 |
| AS7C3513-20JC | Octal Buffers/Drivers With 3-State Outputs 20-TSSOP -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C513B-12JCN | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 Fast Asynch 5V 32Kx16 12ns 512K RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C513B-12TCN | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512K, 5V, 12ns, FAST 32K x 16 Asynch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C513B-12TCNTR | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512K, 5V, 12ns, FAST 32K x 16 Asynch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C513B-15JCN | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512K, 5v, 15ns, FAST 32K x 16 Asynch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C513B-15JCNTR | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512K, 5v, 15ns, FAST 32K x 16 Asynch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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