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參數(shù)資料
| 型號(hào)： | AS7C3513B-12JC |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | Octal Buffer/Driver With 3-State Outputs 20-TVSOP -40 to 85 |
| 中文描述： | 32K X 16 STANDARD SRAM, 12 ns, PDSO44 |
| 封裝： | 0.400 INCH, PLASTIC, SOJ-44 |
| 文件頁(yè)數(shù)： | 2/10頁(yè) |
| 文件大?。?/td> | 217K |
| 代理商： | AS7C3513B-12JC |
AS7C3513B
3/24/04, v.1.2
Alliance Semiconductor
P. 2 of 10
Functional description
The AS7C3513B is a high performance CMOS 524,288-bit Static Random Access Memory (SRAM) device organized as 32,768 words × 16
bits. They are designed for memory applications where fast data access, low power, and simple interfacing are desired.
Equal address access and cycle times (t
AA
, t
RC
, t
WC
) of 10/12/15/20 ns with output enable access times (t
OE
) of 5, 6, 7, 8 ns are ideal for
high performance applications. The chip enable input CE permits easy memory expansion with multiple-bank memory systems.
When CE is high, the device enters standby mode. If inputs are still toggling, the device consumes I
SB
power. If the bus is static, then the full
standby power is reached (I
SB1
). The AS7C3513B is guaranteed not to exceed 18mW power consumption under nominal full standby
conditions.
A write cycle is accomplished by asserting write enable (WE), (UB) and/or (LB), and chip enable (CE). Data on the input pins I/O0 - I/O7,
and/or I/O8 – I/O15, is written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices
should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).
A read cycle is accomplished by asserting output enable (OE), (UB) and (LB), and chip enable (CE), with write enable (WE) high. The chips
drive I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or write enable is
active, or (UB) and (LB), output drivers stay in high-impedance mode.
The devices provide multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be written and
read. LB controls the lower bits, I/O0 – I/O7, and UB controls the higher bits, I/O8 – I/O15.
All chip inputs and outputs are TTL-compatible. The AS7C3513B is packaged in common industry standard packages.
Absolute maximum ratings
NOTE: Stresses greater than those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating only and func-
tional operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect reliability.
Truth table
Key: X = Don’t care; L = Low; H = High
Parameter
Symbol
Min
Max
Unit
Voltage on V
CC
relative to GND
Voltage on any pin relative to GND
V
t1
V
t2
P
D
T
stg
T
bias
I
OUT
–0.50
+5.0
V
–0.50
V
CC
+0.50
1.0
V
Power dissipation
–
W
o
C
o
C
Storage temperature (plastic)
–65
+150
Ambient temperature with V
CC
applied
DC current into outputs (low)
–55
+125
–
20
mA
CE
WE
OE
LB
UB
I/O0–I/O7
I/O8–I/O15
Mode
H
X
X
X
X
High Z
High Z
Standby (I
SB
, I
SBI
)
Read I/O0–I/O7 (I
CC
)
Read I/O8–I/O15 (I
CC
)
Read I/O0–I/O15 (I
CC
)
Write I/O0–I/O15 (I
CC
)
Write I/O0–I/O7 (I
CC
)
Write I/O8–I/O15 (I
CC
)
L
H
L
L
H
D
OUT
High Z
High Z
L
H
L
H
L
D
OUT
D
OUT
D
IN
High Z
L
H
L
L
L
D
OUT
D
IN
D
IN
High Z
L
L
X
L
L
L
L
X
L
H
L
L
X
H
L
D
IN
L
L
H
X
H
X
X
H
X
H
High Z
High Z
Output disable (I
CC
)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS7C3513B-12JCN | 3.3V 32K x 16 CMOS SRAM |
| AS7C3513B-12JI | Octal Buffer/Driver With 3-State Outputs 20-SOIC -40 to 85 |
| AS7C3513B-12JIN | Octal Buffer/Driver With 3-State Outputs 20-SOIC -40 to 85 |
| AS7C3513B-12TC | 3.3V 32K x 16 CMOS SRAM |
| AS7C3513B-12TCN | Octal Buffer/Driver With 3-State Outputs 20-SOIC -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C3513B-12JCN | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512K 3.3V 12ns FAST 32K x 16 Asynch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C3513B-12JCNTR | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512K 3.3V 12ns FAST 32K x 16 Asynch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C3513B-12TCN | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512K 3.3V 12ns FAST 32K x 16 Asynch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C3513B-12TCNTR | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512K 3.3V 12ns FAST 32K x 16 Asynch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C3513B-15JCN | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512K 3.3V 15ns FAST 32K x 16 Asynch 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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