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參數(shù)資料
| 型號(hào)： | AS7C3364PFD32B |
| 廠商： | Alliance Semiconductor Corporation |
| 英文描述： | 3.3V 64K X 32/36 pipeline burst synchronous SRAM |
| 中文描述： | 3.3 64K的X 32/36管道爆裂同步SRAM |
| 文件頁(yè)數(shù)： | 7/19頁(yè) |
| 文件大?。?/td> | 549K |
| 代理商： | AS7C3364PFD32B |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)當(dāng)前第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)
AS7C3364PFD32B
AS7C3364PFD36B
1/31/05; v.1.1
Alliance Semiconductor
P. 7 of 19
Synchronous truth table
[4]
CE0
1
H
L
L
L
L
L
L
L
L
X
X
X
X
H
H
H
H
L
X
H
X
H
1 X = don’t care, L = low, H = high
2 For WRITE, L means any one or more byte write enable signals (BWa, BWb, BWc or BWd) and BWE are LOW or GWE is LOW. WRITE = HIGH for all
BWx, BWE, GWE HIGH. See "Write enable truth table (per byte)," on page 6 for more information.
3
For write operation following a READ,
OE
must be high before the input data set up time and held high throughout the input hold time
4 ZZ pin is always Low.
CE1
X
L
L
X
X
H
H
H
H
X
X
X
X
X
X
X
X
H
X
X
X
X
CE2
X
X
X
H
H
L
L
L
L
X
X
X
X
X
X
X
X
L
X
X
X
X
ADSP
X
L
H
L
H
L
L
H
H
H
H
H
H
X
X
X
X
H
H
X
H
X
ADSC
L
X
L
X
L
X
X
L
L
H
H
H
H
H
H
H
H
L
H
H
H
H
ADV
X
X
X
X
X
X
X
X
X
L
L
H
H
L
L
H
H
X
L
L
H
H
WRITE
[2]
X
X
X
X
X
X
X
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
OE
X
X
X
X
X
L
H
L
H
L
H
L
H
L
H
L
H
X
X
X
X
X
Address accessed
NA
NA
NA
NA
NA
External
External
External
External
Next
Next
Current
Current
Next
Next
Current
Current
External
Next
Next
Current
Current
CLK
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
Operation
Deselect
Deselect
Deselect
Deselect
Deselect
Begin read
Begin read
Begin read
Begin read
Continue read
Continue read
Suspend read
Suspend read
Continue read
Continue read
Suspend read
Suspend read
Begin write
Continue write
Continue write
Suspend write
Suspend write
DQ
Hi
Z
Hi
Z
Hi
Z
Hi
Z
Hi
Z
Q
Hi
Z
Q
Hi
Z
Q
Hi
Z
Q
Hi
Z
Q
Hi
Z
Q
Hi
Z
D
3
D
D
D
D
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS7C3364PFD32B-133TQC | 3.3V 64K X 32/36 pipeline burst synchronous SRAM |
| AS7C3364PFD32B-133TQCN | 3.3V 64K X 32/36 pipeline burst synchronous SRAM |
| AS7C3364PFD32B-133TQI | 3.3V 64K X 32/36 pipeline burst synchronous SRAM |
| AS7C3364PFD32B-133TQIN | 3.3V 64K X 32/36 pipeline burst synchronous SRAM |
| AS7C3364PFD32B-166TQC | 3.3V 64K X 32/36 pipeline burst synchronous SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C3364PFD32B-133TQC | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 64K X 32/36 pipeline burst synchronous SRAM |
| AS7C3364PFD32B-133TQCN | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 64K X 32/36 pipeline burst synchronous SRAM |
| AS7C3364PFD32B-133TQI | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 64K X 32/36 pipeline burst synchronous SRAM |
| AS7C3364PFD32B-133TQIN | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 64K X 32/36 pipeline burst synchronous SRAM |
| AS7C3364PFD32B-166TQC | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 64K X 32/36 pipeline burst synchronous SRAM |
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