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參數(shù)資料
| 型號： | AS7C33128PFS36A |
| 廠商： | Alliance Semiconductor Corporation |
| 英文描述： | 3.3V 128K X 32/36 pipeline burst synchronous SRAM |
| 中文描述： | 3.3 128K的X 32/36管道爆裂同步SRAM |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 339K |
| 代理商： | AS7C33128PFS36A |
March 2002
Copyright Alliance Semiconductor. All rights reserved.
AS7C33128PFS32A
AS7C33128PFS36A
3.3V 128K X 32/36 pipeline burst synchronous SRAM
3/4/02; v.1.4
Alliance Semiconductor
P. 1 of 13
Features
Organization: 131,072 words × 32 or 36 bits
Fast clock speeds to 200 MHz in LVTTL/LVCMOS
Fast clock to data access: 3.0/3.1/3.5/4.0/5.0 ns
Fast OE access time: 3.0/3.1/3.5/4.0/5.0 ns
Fully synchronous register-to-register operation
Single register “Flow-through” mode
Single-cycle deselect
Dual-cycle deselect also available (AS7C33128PFD32A/
AS7C33128PFD36A)
Pentium
1
compatible architecture and timing
Asynchronous output enable control
Economical 100-pin TQFP package
Byte write enables
Multiple chip enables for easy expansion
3.3 core power supply
2.5V or 3.3V I/O operation with separate V
DDQ
30 mW typical standby power in power down mode
NTD
1
pipeline architecture available
(AS7C33128NTD32A/ AS7C33128NTD36A)
1 Pentium
is a registered trademark of Intel Corporation. NTD is a
trademark of Alliance Semiconductor Corporation. All trademarks
mentioned in this document are the property of their respective owners.
Logic block diagram
Q0
Q1
17
12Memory
array
Burst logic
CLK
CE
CLR
Address
D
CE
CLK
Q
DQ
CLK
D
Q
registers
DQ
CLK
D
Q
registers
DQ
CLK
D
Q
registers
DQ
CLK
D
Q
registers
Enable
register
CLK
D
Q
delay
register
CLK
D
Q
CE
Output
CLK
rInput
CLK
Power
4
36/32
17
15
17
GWE
BWE
BW
d
ADSC
ADSP
CLK
CE0
CE2
BW
c
BW
b
BW
a
OE
A
[16:0]
ZZ
LBO
OE
FT
36/32
36/32
DQ [a:d]
Pin arrangement
DQP
c
/NC
DQ
c
DQ
c
V
DDQ
V
SSQ
DQ
c
DQ
c
DQ
c
DQ
c
V
SSQ
V
DQ
c
DQ
c
FT
V
DD
NC
V
SS
DQ
d
DQ
d
V
DDQ
V
SSQ
DQ
d
DQ
d
DQ
d
DQ
d
V
SSQ
V
DQ
d
DQ
d
DQP
d
/NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
DQP
b
/NC
DQ
b
DQ
b
V
DDQ
V
SSQ
DQ
b
DQ
b
DQ
b
DQ
b
V
SSQ
V
DDQ
DQ
b
DQ
b
V
SS
NC
VDD
ZZ
DQ
a
DQ
a
V
DDQ
V
SSQ
DQ
a
DQ
a
DQ
a
DQ
a
V
SSQ
V
DDQ
DQ
a
DQ
a
DQP
a
/NC
L
A
A
A
A
A
A
N
N
V
S
V
D
N
N
A
A
A
A
A
A
3
3
3
3
3
3
3
3
3
4
4
4
4
4
4
4
4
4
4
5
1
9
9
9
9
9
9
9
9
9
9
8
8
8
8
8
8
8
8
8
A
A
C
C
B
d
B
c
B
b
B
a
C
V
D
V
S
C
G
B
O
A
A
A
A
A
A
Note: Pins 1,30,51,80 are NC for ×32
TQFP 14 × 20 mm
Selection guide
–200
–183
–166
–133
–100
Units
Minimum cycle time
5
5.4
6
7.5
10
ns
Maximum clock frequency
200
183
166
133
100
MHz
Maximum pipelined clock access time
3
3.1
3.5
4
5
ns
Maximum operating current
570
540
475
425
325
mA
Maximum standby current
160
140
130
100
90
mA
Maximum CMOS standby current (DC)
30
30
30
30
30
mA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS7C33128PFS36A-133TQC | 3.3V 128K X 32/36 pipeline burst synchronous SRAM |
| AS7C33128PFS36A-133TQI | 3.3V 128K X 32/36 pipeline burst synchronous SRAM |
| AS7C33128PFS32A-166TQI | 3.3V 128K X 32/36 pipeline burst synchronous SRAM |
| AS7C33128PFS32A-200TQC | LM4040 Precision Micropower Shunt Voltage Reference; Package: SOT-23; No of Pins: 3; Qty per Container: 3000; Container: Reel |
| AS7C33128PFS32A-200TQI | LM4040 Precision Micropower Shunt Voltage Reference; Package: SOT-23; No of Pins: 3; Qty per Container: 3000; Container: Reel |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C33128PFS36A-100TQC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 128K X 32/36 pipeline burst synchronous SRAM |
| AS7C33128PFS36A-100TQI | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 128K X 32/36 pipeline burst synchronous SRAM |
| AS7C33128PFS36A-133TQC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 128K X 32/36 pipeline burst synchronous SRAM |
| AS7C33128PFS36A-133TQI | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 128K X 32/36 pipeline burst synchronous SRAM |
| AS7C33128PFS36A-166TQC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 128K X 32/36 pipeline burst synchronous SRAM |
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