參數(shù)資料
型號(hào)： AS7C33128NTD18B-200TQC
廠商： ALLIANCE SEMICONDUCTOR CORP
元件分類(lèi)： DRAM
英文描述： 3.3V 128Kx18 Pipelined SRAM with NTD
中文描述： 128K X 18 ZBT SRAM, 3 ns, PQFP100
封裝： 14 X 20 MM, TQFP-100
文件頁(yè)數(shù)： 8/19頁(yè)
文件大?。?/td> 443K
代理商： AS7C33128NTD18B-200TQC
AS7C33128NTD18B
4/28/05
;
v.1.3
Alliance Semiconductor
P. 8 of 19
DC electrical characteristics for 3.3V I/O operation
DC electrical characteristics for 2.5V I/O operation
LBO pin has an internal pull-up and input leakage = -10
μ
A.
*
V
IH
max < VDD +1.5V for pulse width less than 0.2 X t
CYC
**
V
IL
min = -1.5 for pulse width less than 0.2 X t
CYC
I
DD
operating conditions and maximum limits
Parameter
Sym
Conditions
Min
Max
Unit
Input leakage current
|I
LI
|
V
DD
= Max, 0V < V
IN
< V
DD
OE
≥
V
IH
, V
DD
= Max, 0V < V
OUT
< V
DDQ
-2
2
μA
Output leakage current
|I
LO
|
-2
2
μA
Input high (logic 1) voltage
V
IH
Address and control pins
2*
V
DD
+0.3
V
I/O pins
2*
V
DDQ
+0.3
Input low (logic 0) voltage
V
IL
Address and control pins
-0.3**
0.8
V
I/O pins
-0.5**
0.8
Output high voltage
V
OH
I
OH
= –4 mA, V
DDQ
= 3.135V
2.4
–
V
Output low voltage
V
OL
I
OL
= 8 mA, V
DDQ
= 3.465V
–
0.4
V
Parameter
Sym
Conditions
Min
Max
Unit
Input leakage current
|I
LI
|
V
DD
= Max, 0V < V
IN
< V
DD
OE
≥
V
IH
, V
DD
= Max, 0V < V
OUT
< V
DDQ
-2
2
μA
Output leakage current
|I
LO
|
-2
2
μA
Input high (logic 1) voltage
V
IH
Address and control pins
1.7*
V
DD
+0.3
V
I/O pins
1.7*
V
DDQ
+0.3
V
Input low (logic 0) voltage
V
IL
Address and control pins
-0.3**
0.7
V
I/O pins
-0.3**
0.7
V
Output high voltage
V
OH
I
OH
= –4 mA, V
DDQ
= 2.375V
1.7
–
V
I
OH
= –1 mA, V
DDQ
= 2.375V
2.0
–
Output low voltage
V
OL
I
OL
= 8 mA, V
DDQ
= 2.625V
–
0.7
V
I
OL
= 1 mA, V
DDQ
= 2.625V
–
0.4
Parameter
Sym
Test conditions
-200
-166
-133
Unit
Operating power supply
current
1
1
I
CC
given with no output loading. I
CC
increases with faster cycle times and greater output loading.
I
CC
CE0 < V
IL
, CE1 > V
IH
, CE2 < V
IL
, f = f
Max
,
I
OUT
= 0 mA, ZZ
<
V
IL
375
350
325
mA
Standby power supply
current
I
SB
All V
IN
≤
0.2V or >
V
DD
– 0.2V,
Deselected,
f = f
Max
, ZZ
<
V
IL
135
120
110
mA
I
SB1
Deselected, f = 0, ZZ
<
0.2V,
all V
IN
≤
0.2V or
≥
V
DD
– 0.2V
30
30
30
I
SB2
Deselected, f = f
Max
, ZZ
≥
V
DD
– 0.2V,
all V
IN
≤
V
IL
or
≥
V
IH
30
30
30
相關(guān)PDF資料
PDF描述
AS7C33128NTD18B-200TQCN 3.3V 128Kx18 Pipelined SRAM with NTD
AS7C33128NTD18B-200TQI 3.3V 128Kx18 Pipelined SRAM with NTD
AS7C33128NTD18B-200TQIN 3.3V 128Kx18 Pipelined SRAM with NTD
AS7C33128NTD36B-133TQCN 3.3V 128Kx32/36 Pipelined SRAM with NTD
AS7C33128NTD36B-133TQI 3.3V 128Kx32/36 Pipelined SRAM with NTD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AS7C33128NTD18B-200TQCN 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 128Kx18 Pipelined SRAM with NTD
AS7C33128NTD18B-200TQI 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 128Kx18 Pipelined SRAM with NTD
AS7C33128NTD18B-200TQIN 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 128Kx18 Pipelined SRAM with NTD
AS7C33128NTD32B 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 128Kx32/36 Pipelined SRAM with NTD
AS7C33128NTD32B-133TQC 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 128Kx32/36 Pipelined SRAM with NTD
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