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參數(shù)資料
| 型號(hào)： | AS7C3256-12 |
| 廠商： | Alliance Semiconductor Corporation |
| 英文描述： | Quadruple D-Type Flip-Flops With Clear 16-SO -40 to 85 |
| 中文描述： | 高性能32Kx8 CMOS SRAM的 |
| 文件頁(yè)數(shù)： | 4/9頁(yè) |
| 文件大?。?/td> | 301K |
| 代理商： | AS7C3256-12 |
AS7C3256A-8
3/22/05; v.1.0
Alliance Semiconductor
P. 4 of 9
Read cycle (over the operating range)
2,8
Key to switching waveforms
Rising input
Read waveform 1 (address controlled)
2,5,6,8
Read waveform 2 (CE controlled)
2,5,7,8
Parameter
Symbol
t
RC
t
AA
t
ACE
t
OE
t
OH
t
CLZ
t
CHZ
t
OLZ
t
OHZ
t
PU
t
PD
-8
Unit
ns
Notes
Min
8
Max
–
Read cycle time
Address access time
–
8
ns
2
Chip enable (CE) access time
–
8
ns
2
Output enable (OE) access time
Output hold from address change
–
5
ns
3
–
ns
4
CE LOW to output in low Z
3
–
ns
3,4
CE HIGH to output in high Z
–
3
ns
3,4
OE LOW to output in low Z
0
–
ns
3,4
OE HIGH to output in high Z
–
3
ns
3,4
Power up time
Power down time
0
–
–
ns
ns
3,4
3,4
10
Undefined output/don’t care
Falling input
Address
D
out
Data valid
t
OH
t
AA
t
RC
Supply
current
CE
OE
D
out
t
RC1
t
OE
t
OLZ
t
ACE
t
CHZ
t
CLZ
t
PU
t
PD
I
CC
I
SB
50%
50%
t
OHZ
Data valid
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS7C3256-15 | Quadruple D-Type Flip-Flops With Clear 16-TSSOP -40 to 85 |
| AS7C3256-20 | Quadruple D-Type Flip-Flops With Clear 16-TSSOP -40 to 85 |
| AS7C3256A-8 | Dual 4-Input Positive-AND Gate 14-SOIC -40 to 85 |
| AS7C3256A-8JC | Dual 4-Input Positive-AND Gate 14-SSOP -40 to 85 |
| AS7C3256A-8TC | Dual 4-Input Positive-AND Gate 14-SSOP -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C3256-12JC | 制造商:Alliance Semiconductor Corporation 功能描述:Static RAM, 32Kx8, 28 Pin, Plastic, SOJ |
| AS7C3256-12JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| AS7C3256-12PC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| AS7C3256-12TC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:IC-SMD-SRAM 256K |
| AS7C3256-15 | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:High Performance 32Kx8 CMOS SRAM |
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