
AS7C31025B
3/24/04, v. 1.3
Alliance Semiconductor
P. 5 of 9
Write cycle (over the operating range)
11
Write waveform 1 (WE controlled)
10,11
Write waveform 2 (CE controlled)
10,11
Parameter
Symbol
t
WC
t
CW
t
AW
t
AS
t
WP
t
WR
t
AH
t
DW
t
DH
t
WZ
t
OW
-10
-12
-15
-20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Min
10
8
8
0
7
0
0
5
0
–
1
Max
–
–
–
–
–
–
–
–
–
5
–
Min
12
9
9
0
8
0
0
6
0
–
1
Max
–
–
–
–
–
–
–
–
–
6
–
Min
15
10
10
0
9
0
0
8
0
–
1
Max
–
–
–
–
–
–
–
–
–
7
–
Min
20
12
12
0
12
0
0
10
0
–
1
Max
–
–
–
–
–
–
–
–
–
8
–
Write cycle time
Chip enable (
CE
) to write end
Address setup to write end
Address setup time
Write pulse width
Write recovery time
Address hold from end of write
Data valid to write end
Data hold time
Write enable to output in high Z
Output active from write end
4, 5
4, 5
4, 5
t
AW
t
AH
t
WC
Address
WE
D
OUT
t
DH
t
OW
t
DW
Data valid
t
WZ
t
WP
t
AS
D
IN
t
WR
t
AW
Address
CE
WE
D
OUT
t
CW
t
WP
t
DW
Data valid
t
DH
t
AH
t
WR
t
WZ
t
WC
t
AS
D
IN