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參數(shù)資料
| 型號： | AS7C31024B |
| 廠商： | Alliance Semiconductor Corporation |
| 英文描述： | 8-Bit Parallel-Out Serial Shift Registers 14-SOIC -40 to 85 |
| 中文描述： | 3.3 128K的× 8 CMOS SRAM的 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 120K |
| 代理商： | AS7C31024B |
March 2004
Copyright 2003 Alliance Semiconductor. All rights reserved.
AS7C31024B
3.3V 128K X 8 CMOS SRAM
3/24/04, v.1.2
Alliance Semiconductor
P. 1 of 9
Features
Industrial and commercial temperatures
Organization: 131,072 words x 8 bits
High speed
- 10/12/15/20 ns address access time
- 5, 6, 7, 8 ns output enable access time
Low power consumption: ACTIVE
- 252 mW / max @ 10 ns
Low power consumption: STANDBY
- 18 mW / max CMOS
6T 0.18u CMOS technology
Easy memory expansion with CE1, CE2, OE inputs
TTL/LVTTL-compatible, three-state I/O
32-pin JEDEC standard packages
- 300 mil SOJ
- 400 mil SOJ
- 8 × 20mm TSOP 1
- 8 x 13.4mm sTSOP 1
ESD protection
≥
2000 volts
Latch-up current
≥
200 mA
Logic block diagram
512 x 256 x 8
Array
(1,048,576)
S
Input buffer
A
A
A
A
A
A
A
I/O0
I/O7
OE
CE1
CE2
WE
Column decoder
R
Control
circuit
A
A0
A1
A2
A3
A4
A5
A6
A7
A8
V
CC
GND
Pin arrangement
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
A
32-pin SOJ (300 mil)
32-pin SOJ (400 mil)
V
NC
A14
A12
A7
A6
A5
A4
A15
WE
A13
A8
A11
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
A3
A2
A0
I/O1
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A
32-pin (8 x 20mm) TSOP I
32-pin (8 x 13.4mm) sTSOP1
Selection guide
-10
10
5
70
5
12
65
5
-15
15
7
60
5
-20
20
8
55
5
Unit
ns
ns
mA
mA
Maximum address access time
Maximum output enable access time
Maximum operating current
Maximum CMOS standby current
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS7C31024B-20STCN | Replaced by SN74LV165A : Parallel-Load 8-Bit Shift Register 16-SOIC -40 to 85 |
| AS7C31024B-20TC | Replaced by SN74LV165A : Parallel-Load 8-Bit Shift Register 16-TSSOP -40 to 85 |
| AS7C31024B-20TCN | Parallel-Load 8-Bit Shift Registers 16-SOIC -40 to 85 |
| AS7C31024B-10TJC | 128 x 64 pixel format, LED or EL Backlight available |
| AS7C31024B-20TJC | 128 x 64 pixel format, LED or EL Backlight available |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C31024B-10JC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 128K X 8 CMOS SRAM |
| AS7C31024B-10JCN | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 128K X 8 CMOS SRAM |
| AS7C31024B-10STC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 128K X 8 CMOS SRAM |
| AS7C31024B-10STCN | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 128K X 8 CMOS SRAM |
| AS7C31024B-10TC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 128K X 8 CMOS SRAM |
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