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參數(shù)資料
| 型號(hào)： | AS7C1024B-10STC |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 5V 128K X 8 CMOS SRAM |
| 中文描述： | 128K X 8 STANDARD SRAM, 10 ns, PDSO32 |
| 封裝： | 8 X 13.40 MM, STSOP1-32 |
| 文件頁(yè)數(shù)： | 5/9頁(yè) |
| 文件大小： | 111K |
| 代理商： | AS7C1024B-10STC |
AS7C1024B
3/26/04, v 1.2
Alliance Semiconductor
P. 5 of 9
Write waveform 1 (WE controlled)
10,11,12
Write cycle (over the operating range)
11, 12
Parameter
Symbol
t
WC
t
CW1
t
CW2
t
AW
t
AS
t
WP
t
WR
t
AH
t
DW
t
DH
t
WZ
t
OW
-10
-12
-15
-20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Min Max Min
10
-
8
-
8
-
8
-
0
7
0
-
0
-
5
0
-
5
1
-
Max
–
–
–
–
–
–
–
–
–
–
6
–
Min
15
10
10
10
0
9
0
0
8
0
–
1
Max
–
–
–
–
–
–
–
–
–
–
7
–
Min
20
12
12
12
0
12
0
0
10
0
–
2
Max
–
–
–
–
–
–
–
–
–
–
8
–
Write cycle time
Chip enable (CE1) to write end
Chip enable (CE2) to write end
Address setup to write end
Address setup time
Write pulse width
Write recovery time
Address hold from end of write
Data valid to write end
Data hold time
Write enable to output in high Z
Output active from write end
12
9
9
9
0
8
0
0
6
0
–
1
12
12
12
4, 5
4, 5
4, 5
t
AW
t
AH
t
WC
Address
WE
D
OUT
t
DH
t
OW
t
DW
Data valid
t
WZ
t
WP
t
AS
D
IN
t
WR
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS7C1024B-10STCN | 5V 128K X 8 CMOS SRAM |
| AS7C1024B-10TC | 5V 128K X 8 CMOS SRAM |
| AS7C1024B-10TCN | 5V 128K X 8 CMOS SRAM |
| AS7C1024B-12JC | 5V 128K X 8 CMOS SRAM |
| AS7C1024B-12JCN | 5V 128K X 8 CMOS SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C1024B-10STCN | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5V 128K X 8 CMOS SRAM |
| AS7C1024B-10TC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5V 128K X 8 CMOS SRAM |
| AS7C1024B-10TCN | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5V 128K X 8 CMOS SRAM |
| AS7C1024B-10TJC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5V 128K X 8 CMOS SRAM |
| AS7C1024B-10TJCN | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5V 128K X 8 CMOS SRAM |
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