參數(shù)資料
型號: AS4LC4M4E0-50JI
英文描述: x4 EDO Page Mode DRAM
中文描述: x4 EDO公司頁面模式的DRAM
文件頁數(shù): 15/15頁
文件大?。?/td> 265K
代理商: AS4LC4M4E0-50JI
ASAS4LC4M4E0
ASAS4LC4M4E1
Copyright Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and
product names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no
responsibility for any errors that may appear in this document. The data contained herein represents Alliance’s best data and/or estimates at the time of issuance. Alliance reserves the right to
change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this
product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or
customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to
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express agreed to in Alliance’s Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance’s Terms and
Conditions of Sale. The purchase of products from Alliance does not convey a license under any patent rights, copyrights, mask works rights, trademarks, or any other intellectual property rights
of Alliance or third parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result
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against all claims arising from such use.
4/11/01; V1.1
Alliance Semiconductor
P. 15 of 15
CAS
-before-
RAS
self refresh cycle
Capacitance
15
Parameter
= 1 MHz, T
a
= Room temperature
Test conditions
Max
AS4LC4M4E0 ordering information
Package \
RAS
access time
AS4LC4M4E1 ordering information
Package \
RAS
access time
AS4LC4M4E0 family part numbering system
AS4
C
Symbol
Signals
Unit
Input capacitance
C
IN1
C
IN2
C
DQ
A0 to A11
V
in
= 0V
V
in
= 0V
V
in
= V
out
= 0V
5
pF
RAS
,
UCAS
,
LCAS
,
WE
,
OE
7
pF
DQ capacitance
DQ0 to DQ3
7
pF
50 ns
60 ns
Plastic SOJ, 300 mil, 24/26-pin
AS4LC4M4E0-50JC
AS4LC4M4E0-50JI
AS4LC4M4E0-60JC
AS4LC4M4E0-60JI
Plastic TSOP, 300 mil, 24/26-pin
AS4LC4M4E0-50TC
AS4LC4M4E0-50TI
AS4LC4M4E0-60TC
AS4LC4M4E0-60TI
50 ns
60 ns
Plastic SOJ, 300 mil, 24/26-pin
AS4LC4M4E1-50JC
AS4LC4M4E1-50JI
AS4LC4M4E1-60JC
AS4LC4M4E1-60JI
Plastic TSOP, 300 mil, 24/26-pin
AS4LC4M4E1-50TC
AS4LC4M4E1-50TI
AS4LC4M4E1-60TC
AS4LC4M4E1-60TI
4M4
E0
–XX
X
X
DRAM
prefix
C = 5V CMOS
LC = 3V CMOS
4M×4
E0=4K refresh
E1=2K refresh
RAS access
time
Package:
J = SOJ 300 mil, 24/26
T = TSOP 300 mil, 24/26
Temperature range
C=Commercial, 0°C to 70°C
I=Industrial, -40°C to 85°C
t
RP
t
RASS
t
RPC
t
CP
t
CHS
t
CEZ
RAS
CAS
CAS
DQ
t
RPS
t
CSR
t
RPC
相關PDF資料
PDF描述
AS4LC4M4E0-50TC x4 EDO Page Mode DRAM
AS4LC4M4E0-50TI x4 EDO Page Mode DRAM
AS4LC4M4E0-60JC x4 EDO Page Mode DRAM
AS4LC4M4E0-60JI x4 EDO Page Mode DRAM
AS4LC4M4E0-60TC x4 EDO Page Mode DRAM
相關代理商/技術參數(shù)
參數(shù)描述
AS4LC4M4E0-50TC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 EDO Page Mode DRAM
AS4LC4M4E0-50TI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 EDO Page Mode DRAM
AS4LC4M4E0-60JC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 EDO Page Mode DRAM
AS4LC4M4E0-60JI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 EDO Page Mode DRAM
AS4LC4M4E0-60TC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 EDO Page Mode DRAM