參數(shù)資料
型號: AS29F040-70LC
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 5V 512K x 8 CMOS FLASH EEPROM
中文描述: 512K X 8 FLASH 5V PROM, 70 ns, PQCC32
封裝: 0.550 X 0.450 INCH, 0.110 INCH HEIGHT, 0.050 INCH PITCH, PLASTIC, MS-016AE, LCC-32
文件頁數(shù): 16/18頁
文件大?。?/td> 341K
代理商: AS29F040-70LC
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Parameter
Input voltage with respect to V
SS
on A9 and OE
Input voltage with respect to V
SS
on all DQ, address and control pins
Current
Includes all pins except V
CC
. Test conditions: V
CC
= 5.0V, one pin at a time.
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Parameter
Input voltage (Input or DQ pin)
Input voltage (A9 pin, OE)
Power supply voltage
Operating temperature
Storage temperature (plastic)
Short circuit output current
NOTE: Stresses greater than those listed under
AbsouteMaximumRatings
may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect reliability.
Includes all pins except V
CC
. Test conditions: V
CC
= 5.0V, one pin at a time.
Parameter
Sector erase and verify-1 time (excludes 00h programming prior to erase)
Byte program time
Chip programming time
Erase/program cycles
Limits
Typical
1.0
45
Unit
sec
μs
sec
cycles
Min
Max
-
-
-
10,000
-
-
-
-
23
-
Min
-1.0
-1.0
-100
Max
+13.0
V
CC
+1.0
+100
Unit
V
V
mA
Symbol
V
IN
V
IN
V
CC
T
OPR
T
STG
I
OUT
Min
–2.0
–2.0
-0.5
–55
–65
-
Max
+7.0
+13.0
+5.5
+125
+125
200
Unit
V
V
V
°C
°C
mA
100 pF*
Device under Test
*including scope
and jig capacitance
V
SS
Test condition
Output load
Input rise and fall times
Input pulse levels
Input timing measurement reference levels
Output timing measurement reference levels
Unit
1 TTL gate
5
0.0-3.0
1.5
1.5
ns
V
V
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