9 - 14
AS1916 - AS1918
Datasheet - Application Information
9 Application Information
9.1 Watchdog Input Current
The watchdog input is driven through an internal buffer and an internal series resistor fromthe watchdog timer
(see Figure 11 on page 8)
. When
pin WDI is left unconnected (watchdog disabled), the watchdog timer is serviced within the watchdog timeout period (see t
WD
on
page 5
) by a
low-high-low pulse fromthe counter chain.
For mnimumwatchdog input current (mnimumoverall power consumption), pull WDI low for most of the watchdog timeout period, pulsing it low-
high-low once within the first 7/8 (87.5%) of the watchdog timeout period to reset the watchdog timer.
Note:
If WDI is externally driven high for the majority of the timeout period, up to 160μA can flow into pin WDI.
9.2 Interfacing to Bi-Directional CPU Reset Pins
Since the reset output of the AS1918 is open drain, this device interfaces easily with processors that have bi-directional reset pins. Connecting
the processor reset output directly to the AS1918 RESETN pin with a single pullup resistor
(see Figure 12)
allows the AS1918 to assert a reset.
Figure 12. AS1918 RESETN-to-CPU Bi-Directional Reset Pin
9.3 Fast Negative-Going Transients
Fast, negative-going V
CC
transients normally do not require the CPU to be shutdown. The AS1916 - AS1918 are virtually immune to such
transients. Resets are issued to the CPU during power-up, powerdown, and brownout conditions.
Note:
V
CC
transients that go 100mV below the reset threshold and last
≤
55μs typically will not assert a reset pulse.
9.4 Valid Reset to V
CC
= 0
The AS1916 - AS1918 are guaranteed to operate properly down to V
CC
= 1V.
For AS1916 and AS1917 applications requiring valid reset levels down to V
CC
= 0, a pulldown resistor to active-low outputs and a pullup resistor
to active-high outputs will ensure that the reset line is valid during the interval where the reset output can no longer sink or source current.
9.5 Watchdog Tips
Careful consideration should be taken when implementing the AS1916 - AS1918 watchdog feature.
One method of supervising software code execution is to set/reset the watchdog input at different places in the code, rather than pulsing the
watchdog input high-low-high or low-high-low This method avoids a loop condition in which the watchdog timer would continue to be reset inside
the loop, preventing the watchdog fromever timng out.
Figure13
shows a flowchart where the input/output driving the watchdog is set high at the beginning of the routine, set low at the beginning of
every subroutine, then set high again when the routine returns to the beginning. If the routine should hang in a subroutine, the problemwould
quickly be corrected, since the I/O is continually set low and the watchdog timer is allowed to time out, causing a reset or interrupt to be issued
(see Watchdog Input Current on page 9)
. This method results in higher averaged WDI input current over time than a case where WDI is held low
for the majority (87.5%) of the timeout period and periodically pulsing it low-high-low
AS1918
CPU
Reset
Generator
V
CC
RESETN
GND
VCC
1
RESETN
GND 2
VCC 5