21 - 29
AS1543/44
Datasheet - Detailed Description
These modes are designed to provide flexible power management options, and can be selected to optimize the power dissipation and through-
put-rate ratio for differing application requirements. The mode of operation of the AS1543/44 is controlled by bits
PM1, PM0 (page 13)
of the con-
trol register.
Note:
When power supplies are first applied to the AS1543/44, internal power-on reset circuitry sets the device for Auto Shutdown (PM1 = 0,
PM0 = x). The AS1543/44 remains in shutdown the first CSN falling edge is received.
Normal Mode (PM1 = 1, PM0 = 1)
This mode is intended for the fastest throughput rate performance as the user does not have to worry about any power-up times with the
AS1543/44 remaining fully powered at all times.
Figure 33
shows the operation of the AS1543/44 in normal mode.Conversion is initiated on the
falling edge of CSN and the track and hold will enter hold mode.
The data presented to pin DIN during the first 13 clock cycles of the data transfer is loaded to the control register (if bit
WRITE (page 13)
is set to
1). If bit
SEQ (page 13)
= 0, and bit
SHADOW (page 13)
= 1 on the previous write, data presented on pin DIN during the first 16 SCLK cycles is
loaded into the shadow register. The device will remain fully
powered up in normal mode at the end of the conversion as long as bits
PM1, PM0 (page 13)
are set to 1 in the write transfer during that conver-
sion.
To ensure continued operation in normal mode, bits PM1 and PM0 are loaded with 1 on every data transfer. Sixteen serial clock cycles are
required to complete the conversion and access the conversion result. The track and hold will go back into track on the 14th SCLK falling edge.
Once a data transfer is complete (DOUT has returned to tri-state, bit
WEAK/TRIN (page 13)
= 0), another conversion can be initiated after the
quiet time (t
QUIET
) has elapsed by bringing CSN low again.
Figure 33. Normal Mode Operation
Notes:
1. Control register data is loaded on the 1st 13 SCLK cycles.
2. Shadow register data is loaded on the 1st 16 SCLK cycles.
Auto Shutdown (PM1 = 0, PM0 = X)
In this mode, the AS1543/44 automatically enters shutdown after the 14th SLK falling edge of each conversion is updated. When the device is in
shutdown mode, the track/hold circuitry is in hold mode.
Note:
The control register maintains its data while in shutdown mode.
Figure 34
shows the operation of the AS1543/44 when it is in automatic shutdown mode The AS1543/44 remains in shutdown until the next CSN
falling edge it receives. On this CSN falling edge, the track and hold that was in hold while the device was in shutdown will return to track.
Note:
Wake-up time from auto shutdown is 1μs.
CSN
SCLK
DOUT
DIN
Data into Control/Shadow Register
Channel ID Bits + Conversion Results