參數(shù)資料
型號(hào): AS1542-BTST
廠商: AUSTRIAMICROSYSTEMS AG
元件分類: ADC
英文描述: 12-bit 16-CH 1Msps w Sequencer; Package Type: TSSOP-28
封裝: TSSOP-28
文件頁數(shù): 3/29頁
文件大小: 964K
代理商: AS1542-BTST
www.austriamicrosystems.com
Revision 1.00
3 - 29
AS1542
Data Sheet - Pinout
4 Pinout
Pin Assignments
Figure 2. Pin Assignments (Top View)
Pin Descriptions
Table 1. Pin Descriptions
Pin Number Pin Name
Description
(see Figure 2)
V
IN
x
Analog Inputs 0:15
.
Sixteen single-ended or eight fully-differential analog input channels
that are multiplexed into the track-and-hold circuitry. Input channels are selected by using
address bits
ADDR3:ADDR0 (page 14)
of the control register. The address bits in
conjunction with bits
SEQ (page 14)
and
SHADOW (page 14)
allow the sequence register
to be programmed. The bit
SE/FDN (page 14)
of the control register selects single-ended
or fully-differential conversion mode. In case of single-ended mode the input range can
extend from [0V to V
REFIN
] or [0V to 2 x V
REFIN
]. In case of fully-differential mode the
differential input range can extend from [-V
REFIN
/2 to +V
REFIN
/2] or [-V
REFIN
to +V
REFIN
].
Note:
Unused inputs should be connected to AGND to avoid noise.
Reference Input
. An external reference must be applied to this input. The voltage range
for the external reference is 2.5V ±1% for specified performance.
Serial Clock
. Provides the serial clock for accessing data from the part. This clock input is
also used as the clock source for the ADC conversion process
2.7 to 5.25V Supply Input.
For the [0V to 2 x V
REFIN
] range, V
DD
must be between 4.75
and 5.25V
Logic Power Supply Input
. The voltage supplied at this pin determines the operating
voltage of the AS1542 serial interface. V
DRIVE
V
DD
required.
Digital Output
. The ADC conversion result is provided serially on this output. Data bits are
clocked out on the falling edge of SCLK. The data stream consists of four address bits
indicating the corresponding conversion channel, followed by 12 bits of conversion data
(MSB first). Output coding may be selected as straight binary or two’s complement
depending on the setting of bit
CODING (page 14)
.
Digital Input
. Data is clocked into to the AS1542 control register on this input
(see Control
Register on page 14)
.
Chip Select
. Active low input. Initiates conversions and also is used to frame the serial
data transfer.
Analog Ground
. Ground reference point for all analog circuitry. All analog input signals
and any external reference signal should be referenced to pin AGND.
Note:
AGND, GND and DGND pins must be connected together.
Digital Logic Ground
. Ground reference point for the V
DRIVE
logic power supply input.
V
DRIVE
should be decoupled to pin DGND.
Supply Ground
. Ground reference point for the V
DD
supply input. The supply input V
DD
should be decoupled to pin GND.
REFIN
SCLK
V
DD
V
DRIVE
DOUT
DIN
CSN
AGND
DGND
GND
7
V
I
4
N
1
V
I
8
V
I
2
V
I
3
V
I
5
V
I
6
V
I
1
V
I
9
V
I
1
V
I
1
V
I
1
V
I
1
D
2
I
2
I
2
I
2
I
2
2
2
D
2
1
1
2
1
1
1
AS1542
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