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| 型號： | AS13986-2828-T |
| 廠商： | AUSTRIAMICROSYSTEMS AG |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Dual 150mA Low-Noise LDO; Package Type: CS-WLP(1.5x1.5)-8; Output Range: 2 x 2,8V |
| 封裝： | CS-WLP(1.5x1.5)-8 |
| 文件頁數(shù)： | 10/13頁 |
| 文件大?。?/td> | 648K |
| 代理商： | AS13986-2828-T |
www.austriamicrosystems.com
Revision 1.02
10 - 13
AS13986
Datasheet - Application Information
External Component Selection
Input Capacitor
A ceramic, tantalum, or film capacitor of 1μF (typ) should be used between pin V
IN
and GND (the value of the capacitor
may be increased without limit). This capacitor must be located a distance of not more than 1cm from V
IN
, and returned
to a clean analog ground
(see Figure 15)
.
Note:
Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a low impedance
source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input, it must be
guaranteed by the manufacturer to have a surge current rating sufficient for the application. There are no
requirements for the ESR on the input capacitor, but tolerance and temperature coefficient must be considered
when selecting the capacitor to ensure the capacitance will be approximately 1μF over the entire operating
temperature range.
Output Capacitor
The AS13986 was specifically designed to use very small ceramic output capacitors (temperature characteristics X7R,
X5R, Z5U or Y5V) in 1 to 22μF range (ESR of 0.005 to 5
Ω
). Tantalum or film capacitors can be used at the output,
however these types of capacitors require more PCB space and are more expensive than ceramic capacitors.
Note:
The output capacitor must meet the minimum capacitance requirement and also have an ESR value which is
within a stable range.
Bypass Capacitor
Noise on both regulator outputs (V
OUT1
and V
OUT2
) can be significantly reduced by connecting a 0.01μF capacitor
between pin BYPASS and GND
(see Figure 15)
, with virtually no effect on the transient response of the AS13986.
Using a bypass capacitor will also prevent output overshoot during start up. This capacitor should be connected
directly to a high-impedance node in the band gap reference circuit. See also
Fast Turn-On Time on page 8
.
Note:
Any significant loading on the high-impedance node will effect the regulated output voltage. For this reason,
DC leakage current through pin BYPASS must be kept as low as possible for best output voltage accuracy.
High-quality ceramic capacitors with NPO or COG dielectric are ideal as bypass capacitors as they typically exhibit
very low leakage current. Polypropylene and polycarbonate film capacitors are also a good choice as these capacitors
typically have extremely low leakage current and are available in small surface-mount packages.
Layout and Grounding Considerations
Well designed PC board layout is essential for optimizing device performance. In addition to providing electrical con-
nections, the AS13986 pins also channel heat away from the die.
!
Wide circuit-board traces and large, solid copper polygons should be used to improve power dissipation.
!
Multiple vias to buried ground planes should be used to further enhance thermal conductivity.
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