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參數(shù)資料
| 型號(hào)： | AS1367-BTDT-18 |
| 廠商： | AUSTRIAMICROSYSTEMS AG |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Adaptive LDO |
| 文件頁(yè)數(shù)： | 13/19頁(yè) |
| 文件大?。?/td> | 460K |
| 代理商： | AS1367-BTDT-18 |
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Revision 1.4
13 - 19
AS1367
Datasheet - Application Information
9.6 Explanation of Dynamic Specifications
9.6.1 Power Supply Rejection Ratio (PSRR)
Known also as Ripple Rejection, this specification measures the ability of the regulator to reject noise and ripple beyond DC. PSRR is a
summation of the individual rejections of the error amplifier, reference and AC leakage through the series pass transistor. The specification, in
the formof a typical attenuation plot with respect to frequency, shows up the gain bandwidth compromses forced upon the designer in low
quiescent current conditions. Generally:
PSSR =
dB using lower case to indicate AC values
(EQ 13)
Power supply rejection ratio is fixed by the internal design of the regulator. Additional rejection must be provided externally.
9.6.2 Output Capacitor ESR
The series regulator is a negative feedback amplifier, and as such is conditionally stable. The ESR of the output capacitor is usually used to
cancel one of the open loop poles of the error amplifier in order to produce a single pole response. Excessive ESR values may actually cause
instability by excessive changes to the closed loop unity gain frequency crossover point. The range of ESR values for stability is usually shown
either by a plot of stable ESR versus load current, or a limt statement in the datasheet.
Some ceramc capacitors exhibit large capacitance and ESR variations with temperature. Z5U and Y5V capacitors may be required to ensure
stability at temperatures below T
AMB
= -10oC. With X7R or X5R capacitors, a 4.7μF capacitor should be sufficient at all operating temperatures.
Larger output capacitor values (10μF max) help to reduce noise and improve load transient-response, stability and power-supply rejection.
9.6.3 Input Capacitor
An input capacitor at V
IN
is required for stability. It is recommended that a 4.7μF capacitor be connected between the AS1364 power supply
input pin V
IN
and ground (capacitance value may be increased without limt subject to ESR limts). This capacitor must be located at a distance
of not more than 1cmfromthe V
IN
pin and returned to a clean analog ground. Any good quality ceramc, tantalum or filmcapacitor may be used
at the input.
9.6.4 Noise
The regulator output is a DC voltage with noise superimposed on the output. The noise comes fromthree sources; the reference, the error
amplifier input stage, and the output voltage setting resistors. Noise is a randomfluctuation and if not mnimzed in some applications, will
produce systemproblems. Additional noise reduction is possible with the AS1367 by connecting a 10nF capacitor between the BYP and the
OUT pins.
9.6.5 Transient Response
The series regulator is a negative feedback system and therefore any change at the output will take a finite time to be corrected by the error
loop. This “propagation time” is related to the bandwidth of the error loop. The initial response to an output transient comes fromthe output
capacitance, and during this time, ESR is the domnant mechanismcausing voltage transients at the output. More generally:
Units are Volts, Amps, Ohms.
(EQ 14)
Thus an initial +50mA change of output current will produce a -12mV transient when the ESR=240m
. Remember to keep the ESR within
stability recommendations when reducing ESR by adding multiple parallel output capacitors.
After the initial ESR transient, there follows a voltage droop during the time that the LDO feedback loop takes to respond to the output change.
This drift is approx. linear in time and sums with the ESR contribution to make a total transient variation at the output of:
Units are Volts, Seconds, Farads, Ohms.
(EQ 15)
Where:
C
LOAD
is output capacitor
T = Propagation delay of the LDO
This shows why it is convenient to increase the output capacitor value for a better support for fast load changes. Of course the formula holds for
t < “propagation time”, so that a faster LDO needs a smaller cap at the load to achieve a simlar transient response. For instance 50mA load
current step produces 50mV output drop if the LDO response is 1μsec and the load cap is 1μF.
There is also a steady state error caused by the finite output impedance of the regulator. This is derived fromthe load regulation specification
discussed above.
20
Log
V
V
IN
---------------
V
TRANSIENT
I
OUTPUT
R
ESR
=
V
TRANSIENT
I
OUTPUT
=
R
ESR
C
LOAD
-----T
+
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS1367-BTDT-30 | Adaptive LDO |
| AS1367-BTDT-33 | Adaptive LDO |
| AS1367-BTDT-45 | Adaptive LDO |
| AS1369-BWLT-18 | 200mA Micro-Sized; Package Type: CS-WLP(1x1)-4; Output Range: 1.8V |
| AS1369-BWLT-15 | 200mA Micro-Sized |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS1367-BTDT-30 | 功能描述:低壓差控制器 - LDO RoHS:否 制造商:Micrel 最大輸入電壓:5.5 V 輸出電壓:Adjustable 輸出電流:10 mA 負(fù)載調(diào)節(jié): 輸出類型:Adjustable, Fixed 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-23-6 |
| AS1367BTDT33 | 制造商:ams 功能描述:T&R / TDFN 2x2 8 |
| AS1367-BTDT-33 | 功能描述:低壓差控制器 - LDO RoHS:否 制造商:Micrel 最大輸入電壓:5.5 V 輸出電壓:Adjustable 輸出電流:10 mA 負(fù)載調(diào)節(jié): 輸出類型:Adjustable, Fixed 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-23-6 |
| AS1367-BTDT-45 | 功能描述:IC REG LDO 4.5V .15A 8-TDFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):正，固定式 輸出電壓:2.5V 輸入電壓:2.5 V ~ 5.5 V 電壓 - 壓降（標(biāo)準(zhǔn)）:- 穩(wěn)壓器數(shù)量:1 電流 - 輸出:300mA（最小值） 電流 - 限制（最?。?360mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-5 細(xì)型，TSOT-23-5 供應(yīng)商設(shè)備封裝:TSOT-23-5 包裝:帶卷 (TR) |
| AS1369 | 制造商:AMSCO 制造商全稱:austriamicrosystems AG 功能描述:200mA Ultra-Compact Low Dropout Regulator |
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