參數(shù)資料
型號: AS1344-BTDT
廠商: AUSTRIAMICROSYSTEMS AG
元件分類: DC/DC變換器
英文描述: 42V DCDC for OLED; Package Type: TDFN(3x3)-10
封裝: TDFN(3x3)-10
文件頁數(shù): 10/19頁
文件大小: 1807K
代理商: AS1344-BTDT
www.austriamicrosystems.com
Revision 1.05
10 - 19
AS1344
Datasheet - Detailed Description
8 Detailed Description
The AS1344 features a current limiting circuitry, a fixed-frequency PWM architecture, power-OK circuitry, thermal pro-
tection, and an automatic powersave mode in a tiny package, and maintains high efficiency at light loads.
Figure 32. Block Diagram with Shutdown Disconnect Switch
Automatic powersave mode regulates the output and also reduces average current flow into the device, resulting in
high efficiency at light loads. When the output increases sufficiently, the powersave comparator output remains high,
resulting in continuous operation.
For each oscillator cycle, the power switch is enabled. A voltage proportional to switch current is added to a stabilizing
ramp and the resulting sum is delivered to the positive terminal of the PWM comparator.
The error amplifier compares the voltage at FB with the internal 1.25V reference and generates an error signal (V
C
).
When V
C
is below the powersave mode threshold voltage the automatic powersave-mode is activated and the hyster-
etic comparator disables the power circuitry, with only the low-power circuitry still active (total current consumption is
minimized).
When a load is applied, V
FB
decreases; V
C
increases and enables the power circuitry and the device starts switching.
In light loads, the output voltage (and the voltage at FB) will increase until the powersave comparator disables the
power circuitry, causing the output voltage to decrease again. This cycle is repeated resulting in low-frequency ripple at
the output.
POK Function
The POK output indicates if the output voltage is within 90% of the nominal voltage level. As long as the output voltage
is within regulation the open-drain POK output is high impedance. The POK output can be tied to any external voltage
up to a maximum of 5V via a pull-up resistance R3
(see Typical Application on page 12)
. If the output voltage drops
below 90% of the nominal voltage the POK pin is pulled to GND.
Note:
It is important to consider that in shutdown mode the POK output is pulled to V
CC
in order to save current.
AS1344
+
PWM
Control
Slope
Compensator
1 MHz
Spread
Spectrum
Ramp
Generator
+
Powersave
Operation
Control
Shutdown
Control
PWM
Comp
Σ
+
1.25V
Ref
Sync Drive
Control
V
OUT
Good
1.13V
g
m
Error
Amp
Shutdown
Powersave
0.9
Ω
NMOS
R
2
R
1
D
1
C
OUT
4.7μF
Output Voltage
5.5V to 42V
Current
Sense
R
C
C
P2
C
C
PGND
5
1
EN
10
FB
6
LX
V
C
9
VOUT
GND
3
0.3
Ω
PMOS
L
1
6.8μH
R
V
7
SWOUT
8
VIN
2
POK
C
IN
10μF
Input Voltage
0.9V to 3.6V
4
V
CC
Short
Delay
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