
AS1153, AS1157
Dual LVDS Receiver
Revision 1.021 - 16
Datasheet
1 General Description
The AS1153, AS1157 are dual flow-through LVDS (low-voltage differ-
ential signaling) receivers which accept LVDS differential inputs and
convert themto LVCMOS outputs. The receivers are perfect for low-
power low-noise applications requiring high signaling rates and
reduced EMI emssions.
The devices are guaranteed to receive data at speeds up to
260Mbps (130MHz) over controlled impedance media of approxi-
mately 100
Ω
. Supported transmssion media are PCB traces, back-
planes, and cables.
The AS1153, AS1157 features integrated parallel termnation resis-
tors (nomnally 107
Ω
), which elimnate the requirement for discrete
termnation resistors, and reduce stub lengths. The AS1153, AS1157
uses high impedance inputs and requires an external termnation
resistor when used in a point-to-point connection.
The integrated Failsafe feature sets the output high if the inputs are
open, undriven and termnated, or undriven and shorted.
All inputs conformto the
ANSI TIA/EIA- 644
LVDS standards. Flow-
through pinout simplifies PC board layout and reduces crosstalk by
separating the LVDS inputs and LVCMOS outputs.
The devices are available in a 8-pin SOIC package.
Figure 1. AS1153, AS1157 - Block Diagram
2 Key Features
Flow-Through Pinout
Guaranteed 260Mbps Data Rate
300ps Pulse Skew (Max)
Conformto
ANSI TIA/EIA-644
LVDS Standards
Single +3.3V Supply
Operating Temperature Range: -40°C to +85oC
Failsafe Circuit
Integrated Termnation (AS1157)
8-pin SOIC Package
3 Applications
Digital Copiers, Laser Printers, Cellular Phone Base Stations, Add/
Drop Muxes, Digital Cross-Connects, DSLAMs, Network Switches/
Routers, Backplane Interconnect, Clock Distribution Computers,
Intelligent Instruments, Controllers, Critical Mcroprocessors and
Mcrocontrollers, Power Monitoring, and Portable/Battery-Powered
Equipment.
AS1153/57
IN1-
IN1+
IN2+
IN2-
VCC
OUT1
OUT2
GND