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參數(shù)資料
| 型號： | ARM2815T |
| 英文描述： | Hi-Rel DC-DC MegaRad-Hard Triple Converter in a ARM package |
| 中文描述： | 高可靠性的DC - DC MegaRad硬三轉(zhuǎn)換器在ARM的包 |
| 文件頁數(shù)： | 4/13頁 |
| 文件大?。?/td> | 94K |
| 代理商： | ARM2815T |
4
www.irf.com
ARM28XXT Series
Group A Tests
V
IN
= 28Volts, C
L
=0
unless otherwise specified.
Notes to Group A Test Table
1.
Parameter verified during dynamic load regulation tests.
2.
Guaranteed for DC to 20 MHz bandwidth. Test conducted using a 20KHz to 2MHz bandwidth.
3.
4.
Load current is stepped for output under test while other outputs are fixed at half rated load.
Each output is measured for all combinations of line and load. Only the minimum and maximum readings for each output are recorded.
5.
Load step transition time
≥
10μS.
Recovery time is measured from the initiation of the transient to where V
OUT
has returned to within ±1% of its steady state value.
Turn on delay time is tested by application of a logical low to high transition on the enable pin (pin 3) with power present at the input.
Subgroups 1 and 4 are performed at +25oC, subgroups 2 and 5 at -55oC and subgroups 3 and 6 at +125oC.
6.
7.
8.
Test
Symbol
Conditions unless otherwise specified
Group A
Subgroups
Min
Max
Units
Output voltage accuracy
V
OUT
I
OUT
= 1.5 Adc
I
OUT
= ±250mAdc
I
OUT
= ±250mAdc
(main)
ARM2812(dual)
ARM2815(dual)
1, 2, 3
1, 2, 3
1, 2, 3
4.95
±11.70
±14.50
5.05
±12.30
±15.15
V
Output power Note 1
P
OUT
V
IN
= 19 V, 28V, 50 V
1, 2, 3
3
30
W
Output current
Note 1
I
OUT
V
IN
19 V, 28V, 50 V
(main)
(dual)
1, 2, 3
1, 2, 3
150
75
3000
500
mA
Output regulation Note
4
VR
I
OUT
= 150, 1500, 3000mAdc
V
IN
= 19 V, 28V, 50 V
I
OUT
= ±75, ±310, ±625mAdc
I
OUT
= ±75, ±250, ±500mAdc
(main)
2812(dual)
2815(dual)
1, 2, 3
1, 2, 3
1, 2, 3
4.8
±11.1
±14.0
5.2
±12.9
±15.8
V
Input current
I
IN
I
OUT
= minimum rated, Pin 3 open
Pin 3 shorted to pin 2 (disabled)
1, 2, 3
1, 2, 3
250
8
mA
Output ripple Note 2
V
RIP
V
IN
= 19 V, 28V, 50 V
I
OUT
= 3000mA main, ±500mA dual
1, 2, 3
100
mV
P-P
Input ripple Note 2
I
RIP
V
IN
= 19 V, 28V, 50 V
I
OUT
= 3000mA main, ±500mA dual
1, 2, 3
150
mA
P-P
Switching frequency
F
S
Synchronization pin (pin 6) open
4, 5, 6
225
275
KHz
Efficiency
Eff
I
OUT
= 800mA main, ±500mA dual
1
2, 3
80
78
%
Power dissipation,
load fault
P
D
Short circuit, any output
1, 2, 3
7.5
W
Output response to step
load changes Notes 3,
5
V
TL
10% Load to/from 50% load
50% Load to/from 100% load
4, 5, 6
4, 5, 6
-200
-200
200
mV
PK
Recovery time from
step load changes
Notes 5, 6
T
TL
10% Load to/from 50% load
50% Load to/from 100% load
4, 5, 6
4, 5, 6
200
200
μS
Turn on overshoot
V
OS
I
OUT
= minimum and full rated
(main)
(dual)
4, 5, 6
4, 5, 6
500
1500
mV
Turn on delay Note 7
T
DLY
I
OUT
= minimum and full rated
4, 5, 6
5
20
mS
Isolation
ISO
500VDC Input to output or any pin to case
(except pin 12)
1
100
M
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