參數(shù)資料
型號: APT30M36LLL
廠商: Advanced Power Technology Ltd.
英文描述: Power MOS 7TM is a new generation of low loss, high voltage, N-Channel enhancement mode power MOSFETS.
中文描述: 電源MOS 7TM是一個低損耗,高電壓,N溝道增強型功率MOSFET的新一代。
文件頁數(shù): 2/2頁
文件大小: 69K
代理商: APT30M36LLL
Diode Forward Voltage
2
(V
GS
= 0V, I
S
= -I
D[Cont.]
)
Reverse Recovery Time (I
S
= -I
D[Cont.]
, dl
S
/dt = 100A/μs)
Reverse Recovery Charge (I
S
= -I
D[Cont.]
, dl
S
/dt = 100A/μs)
Peak Diode Recovery
dv
/
dt 5
INFORMATION
DYNAMIC CHARACTERISTICS
APT30M36JLL
0
THERMAL CHARACTERISTICS
Symbol
R
q
JC
R
q
JA
MIN
TYP
MAX
0.27
40
UNIT
°C/W
Characteristic
Junction to Case
Junction to Ambient
APT's devices are covered by one or more of the following U.S.patents: 4,895,810
5,045,903
4,748,103
5,089,434
5,283,202
5,182,234
5,231,474
5,019,522
5,434,095
5,262,336
5,528,058
5,256,583
SOT-227 (ISOTOP
) Package Outline
31.5 (1.240)
31.7 (1.248)
7.8 (.307)
8.2 (.322)
Dimensions in Millimeters and (Inches)
30.1 (1.185)
38.0 (1.496)
14.9 (.587)
11.8 (.463)
8.9 (.350)
Hex Nut M4
0.75 (.030)
12.6 (.496)
25.2 (0.992)
1.95 (.077)
* Source
Drain
Gate
*
r = 4.0 (.157)
4.0 (.157)
W=4.1 (.161)
(4 places)
3.3 (.129)
* Source
Source terminals are shorted
internally. Current handling
Symbol
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
Test Conditions
V
GS
= 0V
V
DS
= 25V
f = 1 MHz
V
GS
= 10V
V
DD
= 0.5 V
DSS
I
D
= I
D[Cont.]
@ 25°C
V
GS
= 15V
DD
DSS
D
= I
D[Cont.]
@ 25°C
G
= 0.6
W
MIN
TYP
MAX
6540
1564
74
122
33
47
14
19
30
5
UNIT
pF
nC
ns
Characteristic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
3
Gate-Source Charge
Gate-Drain ("Miller") Charge
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Characteristic / Test Conditions
Continuous Source Current (Body Diode)
Pulsed Source Current
1
(Body Diode)
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
UNIT
Amps
Volts
ns
μC
V/ns
MIN
TYP
MAX
76
304
1.3
530
11.5
5
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
dv
/
dt
1
Repetitive Rating: Pulse width limited by maximum junction
temperature.
2
Pulse Test: Pulse width < 380 μs, Duty Cycle < 2%
3
See MIL-STD-750 Method 3471
4
Starting T
j
=
+25°C, L = 0.87mH, R
G
=
25
W
, Peak I
L
= 76A
5 dv
/
dt
numbers reflect the limitations of the test circuit rather than the
device itself.
I
S
-
I
D
[
Cont.
]
di
/
dt
700A/μs
V
R
V
DSS
T
J
150
°
C
APT Reserves the right to change, without notice, the specifications and information contained herein.
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