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參數(shù)資料
| 型號： | APR3103-FBI-TR |
| 廠商： | ANPEC ELECTRONICS CORP |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5 |
| 封裝： | SOT-23, 5 PIN |
| 文件頁數(shù)： | 2/14頁 |
| 文件大小： | 135K |
| 代理商： | APR3103-FBI-TR |
Copyright ANPEC Electronics Corp.
Rev. A.3 - Feb., 2004
APR3101/2/3
www.anpec.com.tw
10
RESET
V CC
GN D
V CC
100K
Application Information
VCC Transient Rejection
The APR3101/2/3 have the function to reject the tran-
sient glitches from the power line. The Maximum Tran-
sient Duration vs. Reset Threshold Overdrive shows
at Typical Characteristics. The transient voltage with
the duration under the curve will not generate a reset
signal, e.g. a transient of 100mV below the reset
threshold voltage have the duration more than 35us, it
will generate a reset signal. Connect a 0.1uF bypass
capacitor to the VCC pin can improve the transient
immunity.
Manual Reset Input
The APR3101/2/3 have 3 output stage versions:
APR3101 is an active low push-pull output,when the
VCC drops below the reset threshold or MR goes low,
the RESET output generates a low signal. APR3102
is an active high push-pull output, when the VCC drops
below the reset threshold or MR goes low; the RE-
SET output generates a high signal (see Timing Chart).
APR3103 is an active low open drain output, the RE-
SET output must be connected a pull-up resistor to a
supply voltage that is lower than 6V, it suits to use in
multiple voltage systems (see Figure 2). The APR3101
RESET output is valid until the VCC=1.2V, below 1.2V
the IC is shutdown, and the output becomes a floating
state. If it is a trouble, a resistor should be connected
from reset output to ground to keep the reset output
low (see Figure 1). For The APR3102, a pull-up resis-
tor to VCC is required to keep the valid reset output for
VCC below 1.2V.@
@
Figure 1. Ensuring RESET Valid to VCC = 0 V
Reset Output
V CC
A P R3103
RESE T
GN D
MR
+3.3V
+5.0V
V CC
GN D
RESE T
IN P UT
5V
System
100k
Figure 2. APR3103 Open Drain Output with Multiple
Supplies
Force the MR low asserts the reset signal, asserted
reset continues as long as MR is low and after the
MR goes high the reset signal is maintained for a fixed
timeout period. The MR is internally connected a 47k
resistor to VCC, so it can be floating if MR is not used.
The MR input also has a debounce time 500ns to avoid
the glitches. It allows use of a mechanical switch or a
TTL, and CMOS logic signal.
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| APR33-33-12CB/M | 功能描述:散熱片 33x33x12mm Medium RoHS:否 制造商:Ampro By ADLINK 產(chǎn)品:Heat Sink Accessories 安裝風(fēng)格:Through Hole 散熱片材料: 散熱片樣式: 熱阻: 長度: 寬度: 高度: 設(shè)計(jì)目的:Express-HRR |
| APR33-33-12CB/S | 功能描述:散熱片 33x33x12mm Short RoHS:否 制造商:Ampro By ADLINK 產(chǎn)品:Heat Sink Accessories 安裝風(fēng)格:Through Hole 散熱片材料: 散熱片樣式: 熱阻: 長度: 寬度: 高度: 設(shè)計(jì)目的:Express-HRR |
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