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參數(shù)資料
| 型號： | APA4838 |
| 廠商： | Anpec Electronics Corporation |
| 英文描述： | Stereo 2.8W Audio Power Amplifier with DC Volume Control and Selectable Gain |
| 中文描述： | 立體聲2.8W音頻功率放大器直流音量控制及可選擇增益 |
| 文件頁數(shù)： | 17/29頁 |
| 文件大?。?/td> | 244K |
| 代理商： | APA4838 |
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Copyright
ANPEC Electronics Corp.
Rev. A.
1 -
Apr
.,
2003
APA4838
www.anpec.com.tw
17
Application Descriptions
BTL Operation
The APA4838 output stage (power amplifier) has two
pairs of operational amplifiers internally, allowed for
different amplifier configurations for each channel.
Vbias
-Out
+Out
RL
OP1
OP2
Gain 1
Gain 2
Volume Control
Amplifier output signal
Figure 1: APA4838 power amplifier internal configu-
ration (each channel)
The power amplifier OP1 gain is setting by internal
unity-gain or external gain setting which is selected
from Gain Select pin and the audio input signal come
from internal volume control block, while the second
amplifier OP2 is internally fixed in a unity-gain, in-
verting configuration. Figure 1 shows that the output
of OP1 is connected to the input to OP2, which re-
sults in the output signals of with both amplifiers with
identical in magnitude, but out of phase 180°.
Consequently, the differential gain for each channel
is 2X (Gain of SE mode).
By driving the load differentially through outputs -Out
and +Out, an amplifier configuration commonly re-
ferred to as bridged mode is established. BTL mode
operation is different from the classical single-ended
SE amplifier configuration where one side of its load
is connected to ground.
BTL Operation (Cont.)
A BTL amplifier design has a few distinct advantages
over the SE configuration, as it provides differential
drive to the load, thus doubling the output swing for a
specified supply voltage.
Four times the output power is possible as compared
to a SE amplifier under the same conditions. A BTL
configuration, such as the one used in APA4838, also
creates a second advantage over SE amplifiers.
Since the differential outputs, +Right Out, -Right Out,
+Left Out, and -Left Out, are biased at half-supply,
no need DC voltage exists across the load. This elimi-
nates the need for an output coupling capacitor which
is required in a single supply, SE configuration.
Single-Ended Operation
Consider the single-supply SE configuration shown
Application Circuit. A coupling capacitor is required
to block the DC offset voltage from reaching the load.
These capacitors can be quite large (approximately
33
μ
F to 1000
μ
F) so they tend to be expensive, oc-
cupy valuable PCB area, and have the additional
drawback of limiting low-frequency performance of
the system (refer to the Output Coupling Capacitor).
The rules described still hold with the addition of the
following relationship:
1
Cbypass x 125k
≤
1
RiCi
<<
1
R
L
C
C
(1)
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