參數(shù)資料
型號: AP160L
廠商: AMIC Technology Corporation
英文描述: Zener Diode; Zener Voltage Typ, Vz:5.1V; Vz Test Current, Izt:20mA; Power Dissipation, Pd:500mW; Package/Case:41-MiniDIP; Leaded Process Compatible:Yes; Mounting Type:Surface Mount; Peak Reflow Compatible (260 C):Yes
中文描述: 8位單片機8KB的檢察官辦公室
文件頁數(shù): 4/25頁
文件大?。?/td> 677K
代理商: AP160L
AP160
PIN DESCRIPTIONS
SYMBOL
VSS
VCC
P0.0-P0.7
Version 0.0
4
AMIC Technology, Inc.
TYPE
I
I
I/O
DESCRIPTIONS
Ground.
Supply voltage.
Port 0 is an 8-bit open drain, bidirectional I/O port. When 1s are written to port 0 pins, the pins
can be used as high-impedance inputs. Port 0 can also be configured to be the multiplexed
low-order address/data bus during accesses to external program and data memory. In this
mode, P0 has internal pullups. Port 0 also receives the code bytes during programming on-chip
OTP EPROM and outputs the code bytes during program verification. External pullups are
required during program verification.
Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can
sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the
internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being
pulled low will source current (
can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter
2 trigger input (P1.1/T2EX), respectively, as shown in the following:
T2
(P1.0): Timer/Counter 2 external count input/clockout (see Programmable Clock-Out)
T2EX
(P1.1): Timer/Counter 2 Reload/Capture/Direction control.
Port 1 also receives the low-order address bytes during programming on-chip OTP EPROM
and verification.
Port 2 is an 8-bit bidirectional I/O port with internal pullups.
The Port 2 output buffers can
sink/source four TTL inputs.
When 1s are written to Port 2 pins, they are pulled high by
the
internal pullups and can be used as inputs. As inputs,
Port 2 pins that are externally being
pulled low will source
current (
address byte during fetches
from external program memory and during accesses to
external
data memory that use 16-bit addresses (MOVX @DPTR). In this application, Port 2 uses strong
internal pullups
when emitting 1s. During accesses to external data
memory that use 8-bit
addresses (MOVX @ RI), Port 2
emits the contents of the P2 Special Function Register.
Port 2
also receives the high-order address bits and some control signals during programming on-chip
OTP EPROM and verification.
Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can
sink/source four TTL inputs.When 1s are written to Port 3 pins, they are pulled high by the
internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being
pulled low will source current (
various special features of the AP160, as shown below:
RXD
(P3.0): Serial input port
TXD
(P3.1): Serial output port
INT0
(P3.2): External interrupt
INT1
(P3.3): External interrupt
T0
(P3.4): Timer 0 external input
T1
(P3.5): Timer 1 external input
WR
(P3.6): External data memory write strobe
RD
(P3.7): External data memory read strobe
Port 3 also receives some control signals for programming and verification.
Reset input. A high on this pin for two machine cycles while the oscillator is running resets the
device.
P1.0-P1.7
I/O
IL
I
) because of the internal pullups. In addition, P1.0 and P1.1
P2.0-P2.7
I/O
IL
I
) because of the internal pullups.
Port 2 emits the high-order
P3.0-P3.7
I/O
IL
I
) because of the pullups.
Port 3 also serves the functions of
RST
I
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