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參數(shù)資料
| 型號： | AOZ1015AI |
| 廠商： | ALPHA |
| 英文描述： | EZBuck⑩ 1.5A Synchronous Buck Regulator |
| 中文描述： | EZBuck⑩1.5A的同步降壓穩(wěn)壓器 |
| 文件頁數(shù)： | 10/15頁 |
| 文件大?。?/td> | 715K |
| 代理商： | AOZ1015AI |
AOZ1015
Rev. 1.2 September 2007
www.aosmd.com
Page 10 of 15
In a buck converter, output capacitor current is continuous.
The RMS current of the output capacitor is decided by
the peak to peak inductor ripple current. It can be
calculated by:
I
L
12
Usually, the ripple current rating of the output capacitor
is a smaller issue because of the low current stress.
When the buck inductor is selected to be very small and
inductor ripple current is high, the output capacitor could
be overstressed.
Loop Compensation
The AOZ1015 employs peak current mode control for
easy use and fast transient response. Peak current mode
control eliminates the double pole effect of the output
L&C filter. It greatly simplifies the compensation loop
design.
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system
in frequency domain. The pole is the dominant pole and
can be calculated by:
The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
where;
C
O
is the output filter capacitor,
R
L
is load resistor value, and
ESR
CO
is the equivalent series resistance of output capacitor.
The compensation design is actually to shape the
converter close loop transfer function to get the desired
gain and phase. Several different types of compensation
networks can be used for the AOZ1015. In most cases, a
series capacitor and resistor network connected to the
COMP pin sets the pole-zero and is adequate for a stable
high-bandwidth control loop.
The FB pin and the COMP pin are the inverting input
and the output of the internal transconductance error
amplifier. A series R and C compensation network
connected to COMP provides one pole and one zero.
The pole is:
where;
G
EA
is the error amplifier transconductance, which is 200 x 10
-6
A/V,
G
VEA
is the error amplifier voltage gain, which is 500 V/V, and
C
C
is compensation capacitor.
The zero given by the external compensation network,
capacitor C
C
(C
5
in Figure 1) and resistor R
C
(R
1
in
Figure 1), is located at:
To design the compensation circuit, a target crossover
frequency f
C
for close loop must be selected. The
system crossover frequency is where the control loop has
unity gain. The crossover frequency is also called the
converter bandwidth. Generally, a higher bandwidth
means faster response to load transient. However,
the bandwidth should not be too high due to system
stability concern. When designing the compensation
loop, converter stability under all line and load conditions
must be considered.
Usually, it is recommended to set the bandwidth to be
less than 1/10 of the switching frequency. The AOZ1015
operates at a fixed switching frequency range from
40
0kHz to 600kHz. It is recommended to choose a
crossover frequency less than
5
0kHz.
The strategy for choosing R
C
and C
C
is to set the cross
over frequency with R
C
and set the compensator zero
with C
C
. Using selected crossover frequency, f
C
, to
calculate R
C
:
where;
f
C
is the desired crossover frequency,
V
FB
is 0.8V,
G
EA
is the error amplifier transconductance, which is 200 x 10
-6
A/V, and
G
CS
is the current sense circuit transconductance, which is
5.64 A/V.
The compensation capacitor C
C
and resistor R
C
together
make a zero. This zero is put somewhere close to the
dominate pole f
p1
but lower than 1/5 of selected
crossover frequency. C
C
can is selected by:
I
CO_RMS
----------
=
f
P
1
1
2
π
C
O
R
L
×
×
-----------------------------------
=
f
Z
1
1
×
2
π
C
O
ESR
CO
×
-------------------------------------------------
=
f
P
2
G
C
C
2
π
G
VEA
×
×
-------------------------------------------
=
f
Z
2
1
2
π
C
C
R
C
×
×
------------------------------------
=
f
C
5
0
kHz
=
R
C
f
C
V
V
FB
-----------
2
π
C
G
CS
×
G
EA
-----------------------------
×
×
=
C
C
1.5
R
C
2
π
f
P
1
×
×
-------------------------------------
=
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