參數(shù)資料
型號(hào)： AOZ1012DI
廠商： ALPHA
英文描述： EZBuck⑩ 3A Simple Buck Regulator
中文描述： EZBuck⑩3A條簡(jiǎn)單的降壓穩(wěn)壓器
文件頁(yè)數(shù)： 12/17頁(yè)
文件大?。?/td> 807K
代理商： AOZ1012DI
^lwNMNOa
loop, converter stability under all line and load condition
must be considered.
Usually, it is recommended to set the bandwidth to be
less than 1/10 of switching frequency. The AOZ1012D
operates at a fixed switching frequency range from
350kHz to 600kHz. It is recommended to choose a
crossover frequency less than 30kHz.
f
C
30
=
The strategy for choosing R
and C
is to set the cross
over frequency with R
and set the compensator zero
with C
. Using selected crossover frequency, f
C
, to
calculate R
C
:
V
f
R
×
=
April 2006
www.aosmd.com
Page 12 of 17
kHz
CS
EA
O
FB
O
C
C
G
G
C
V
×
×
×
π
2
where f
is desired crossover frequency;
V
FB
is 0.8V;
G
is the error amplifier transconductance,
which is 200
·
10
G
is the current sense circuit
transconductance, which is 6.68 A/V;
The compensation capacitor C
and resistor R
together
make a zero. This zero is put somewhere close to the
dominate pole f
but lower than 1/5 of selected
crossover frequency. C
C
can is selected by:
-6
A/V;
1
2
5
R
×
π
p
C
C
f
C
×
=
Equation above can also be simplified to:
C
L
O
C
R
R
C
C
×
=
An easy-to-use application software which helps to
design and simulate the compensation loop can be
found at www.aosmd.com.
Thermal management and layout consideration
In the AOZ1012D buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the VIN pin, to the
LX pins, to the filter inductor, to the output capacitor
and load, and then return to the input capacitor through
ground. Current flows in the first loop when the high
side switch is on. The second loop starts from inductor,
to the output capacitors and load, to the PGND pin of
the AOZ1012D, to the LX pins of the AZO1012D.
Current flows in the second loop when the low side
diode is on.
In PCB layout, minimizing the two loops area reduces
the noise of this circuit and improves efficiency. A
ground plane is strongly recommended to connect input
capacitor, output capacitor, and PGND pin of the
AOZ1012D.
In the AOZ1012D buck regulator circuit, the two major
power dissipating components are the AOZ1012D and
output inductor. The total power dissipation of converter
circuit can be measured by input power minus output
power.
I
V
P
=
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor.
2
=
O
indcutor
I
P
The actual AOZ1012D junction temperature can be
calculated with power dissipation in the AOZ1012D and
thermal impedance from junction to ambient.
P
T
=
(
The maximum junction temperature of AOZ1012D is
150oC, which limits the maximum load current
capability. Please see the thermal de-rating curves for
the maximum load current of the AOZ1012D under
different ambient temperature.
The thermal performance of AOZ1012D is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC will
operate
under
the
recommended
conditions.
Several layout tips are listed below for the best electric
and thermal performance. The figure 3 below illustrates
a PCB layout example as reference.
1.
Do not use thermal relief connection to the VIN
and the PGND pin. Pour a maximized copper
area to the PGND pin and the VIN pin to help
thermal dissipation.
O
O
IN
IN
total
I
V
1
inductor
R
JA
inductor
P
total
junction
Θ
)
environmental
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