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參數(shù)資料
| 型號(hào)： | AND8066D |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Interfacing with ECLinPS |
| 中文描述： | 接口與業(yè)界的EClinPS |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 72K |
| 代理商： | AND8066D |
AND8066/D
http://onsemi.com
2
V
BB
Reference
For a standard differential receiver with two input pins –
D and D – only one of two inputs is suitably selected to
receive the signal while the non–driven input must be biased
to a (DC) reference voltage, V
BB
(see Figure 4).
V
EE
V
CC
V
EE
Figure 4. Standard SE Receivers with V
BB
True
V
BB
V
CC
V
TT
Q
Q
Q
D
D
The V
BB
value is designed to be maintained midway
(50%) between the HIGH and LOW levels of the received
signal, that is, the crosspoint voltage of a differential signal
pair, to preserve the duty cycle and signal integrity (see
Figure 5).
V
BB
or Crosspoint
Figure 5. V
BB
Crosspoint Voltage
True
Invert
LOW
HIGH
If V
BB
shifts, due to drift or noise, above the input signal
50% crosspoint, the device output signal will shift the duty
cycle away from a pure 50% point to a decreased, narrowing
pulse width (see Figure 6).
Figure 6.
V
BB
Input
HIGH
LOW
Output Shift Narrower
If V
BB
shifts below the input signal 50% crosspoint, the
device output signal will shift the duty cycle away from a
pure 50% point to an increased, widening pulse width (see
Figure 7).
Figure 7.
V
BB
Input
HIGH
LOW
Output Shift Wider
Obviously, any error voltage present on the V
BB
reference
level injects jitter directly into the signal.
V
BB
: Voltage Reference Sources
A V
BB
reference voltage output source pin may be available
on the receiver device. When present, V
BB
is an internally
generated voltage supply and available only to that device’s
inputs. Current demand on the V
BB
pin should be limited to 0.5
mA. Bypass (0.01 F) V
BB
to the quietest plane, usually V
CC
,
since noise on V
BB
will inject jitter and corrupt duty cycle. The
V
BB
voltage is derived from referencing the V
CC
supply and
will track changes in V
CC
100% or 1:1. If V
CC
shifts 1 mV,
then V
BB
also changes 1 mV. Changes in V
EE
also affect the
V
BB
voltage and will track at the rate of 0 to 20%, typically 5%.
If V
EE
shifts 100 mV, then V
BB
follows with a 0 mV to 20 mV
shift of the same polarity, typically 5 mV.
A V
BB
reference voltage may be generated off–device and
supplied to the input pins. Ripple content must be kept as low
as possible on V
CC
since it transfers to the signal as jitter and
phase error. A V
BB
voltage reference level may be supplied
from a V
BB
generator, as shown in Figure 8. Any of the “16”
type buffers are recommended to produce a high current gain
V
BB
buffer. For example, the E416, EL16, LVEL16, EP16,
LVEP16, EL17, LVEL17, etc. type devices have a V
BB
pin
available. A 1 K resistor may be needed the feedback path
to stabilize higher gain buffers.
Figure 8. V
BB
Voltage Reference Generator
V
BB(out)
16
RT
V
TT
V
CC
or V
TT
V
BB
0.01 F
1 K
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