參數(shù)資料
型號(hào)： AN8037
廠商： PANASONIC CORP
元件分類： 穩(wěn)壓器
英文描述： AC-DC switching power supply control IC with standby mode
中文描述： 1 A SWITCHING CONTROLLER, 80 kHz SWITCHING FREQ-MAX, PSIP9
封裝： PLASTIC, SIP-9
文件頁(yè)數(shù)： 15/28頁(yè)
文件大?。?/td> 301K
代理商： AN8037
15
Voltage Regulators
AN8027, AN8037
I
Application Notes (continued)
[1] Operation descriptions (continued)
5.
Soft start (continued)
Effective period for the soft start
The effective period for the soft start with the connection of R3 and C4 to the FB pin is approximately
calculated by the following formula.
[Approximate formula]
t
SS
=
R3
×
C4 (s)
It is thought that the effectiveness of the above formula is weakened because of the following reason:
The voltage difference between both ends of C4 rises up to 63% of the voltage at the FB pin within the time
constant
τ
(
=
R3
×
C4), resulting in decrease of the charge current I
FB
, although it depends on the value of R3.
Note that if you increase the capacitance value of C4 unnecessarily, it would decrease the sensitivity of the
feedback by the photocoupler.
Soft start at the re-startup
This IC includes a discharge circuit to instantly discharge charged electrons in the capacitor connected to
the FB pin in order to ensure the soft start at the re-startup.
Conditions for the operation of the discharge circuit are as follows:
1) V
CC
has become the stop voltage or below. (at the normal operation)
2) V
CC
has become the OVP reset threshold voltage or below. (at the OVP operation)
6.
Notes on the feedback control
If the IC output pin (pin 6) falls to a negative voltage lower than that of the GND pin,
the startup operation may fail or the output oscillation may become unstable.
ICs in general, not just this IC, do not respond well when
negative voltages lower than the ground level are applied to
their pins. (Except for special applications.) This is because
parasitic device operations may be induced when negative volt-
ages are applied due to the structure of ICs themselves.
In the case mentioned above, when the IC output (V
OUT
)
is turned off, the power MOSFET drain-to-source voltage,
V
DS
, jumps from a low voltage to a high voltage. The voltage
chattering that occurs at this time is superposed on V
OUT
through the parasitic capacitance Cgd between the power
MOSFET gate and drain, and generates a negative voltage
with respect to the pin. No problems occur if the peak volt-
age, Vex, of this negative voltage does not exceed the para-
sitic device conduction voltage (about
0.7 V).
However, the amplitude of the chattering is larger for
higher input voltages and for larger leakage inductance in the
transformer used. Also, the influence of this phenomenon be-
comes more noticeable for the larger Cgd of the power
MOSFET used, and the Vex peak value also increases. If the
parasitic device conduction voltage is exceeded, then, in this
IC, the parts of the circuit around the feedback circuit (FB)
(in particular, the FB discharge circuit) are influenced. This
can cause momentary drops in the FB pin voltage (the control
voltage), and as a result increase the FB current I
FB
and thus
does not allow the drive pulse on-period T
ON
to be increased.
It may also prevent stabilization of the circuit. These are symp-
toms of the case described here. (Refer to figures 9 and 10.)
GND
Control
voltage
V
OUT
FB
V
DS
Vex
Figure 10
Figure 9
GND
Rectified AC
Out
FB
V
DS
Cgd
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