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參數(shù)資料
| 型號(hào)： | AN8032 |
| 廠商： | PANASONIC CORP |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | Active filter control IC |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PSIP9 |
| 封裝： | PLASTIC, SIP-9 |
| 文件頁(yè)數(shù)： | 3/21頁(yè) |
| 文件大?。?/td> | 206K |
| 代理商： | AN8032 |
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3
Voltage Regulators
AN8032
I
Electrical Characteristics (continued) at T
a
=
25
°
C
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Multiplier input D-range (upper limit) V
MPIH
V
EO
=
5 V
V
EO
=
5 V
4.0
4.5
V
Multiplier output D-range (upper limit)
V
MPOH
4.8
5.4
V
Multiplier gain
G
MP
1.0
1.2
1.4
1/V
Multiplier input bias current
I
MPI
V
MPI
=
0 V
1.5
3.0
μ
A
Coil detection input threshold voltage
V
BTH
1.2
1.5
1.8
V
Coil detection hysteresis width
dV
B
50
100
200
mV
Coil detection high-level clamp voltage
V
BH
I
B
=
5 mA
I
B
=
5 mA
7.0
7.5
8.0
V
Coil detection low-level clamp voltage
V
BL
0.3
0.2
0
V
Current detection input offset voltage V
CSOFF
3.5
15
mV
Current detection input bias current
I
CS
V
OVP
V
CS
=
0 V
0.5
2.0
μ
A
Overvoltage detection input
threshold voltage
2.45
2.60
2.75
V
V
OVP
V
EITH1
70
100
130
mV
Low-level output voltage
V
OUTL
I
OUT
=
100 mA
I
OUT
=
100 mA
0.9
1.5
V
High-level output voltage
V
OUTH
V
OUTSTB
I
OUT
=
10 mA
9.2
10.2
V
Standby output voltage
0.8
1.5
V
U.V.L.O. start voltage
V
CCST
9.2
10.0
10.8
V
U.V.L.O. stop voltage
V
CCSP
7.0
8.0
9.0
V
U.V.L.O. start - stop voltage difference
dV
CC
dV
CC
=
V
CCST
V
CCSP
V
CC
=
7 V
V
CC
=
12 V
1.75
2.00
2.50
V
Standby current
I
CCSTB
40
80
120
μ
A
Operation current without load
I
CC
6.0
10.0
mA
Design reference data
Note) The characteristics listed below are reference values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Error detection feedback
threshold voltage 2
V
EITH2
T
a
=
25
°
C to
+
85
°
C
2.3
2.7
V
Error detection open-loop gain
G
AV
85
dB
Error detection gain band width
f
BW
1.0
MHz
Multiplier input D-range (lower limit) V
MPIL
V
EO
=
5 V
V
EO
=
5 V
0
V
Multiplier output D-range (lower limit)
V
MPOL
Current detection
output delay
Overvoltage detection
output delay
0
V
td
CS
200
ns
td
OVP
500
ns
Output rise time
t
r
V
CC
=
12 V, V
OUT
=
10
% →
90%
V
CC
=
12 V, V
OUT
=
90
% →
10%
50
ns
Output fall time
t
f
50
ns
Timer delay time
td
TIM
400
μ
s
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