參數(shù)資料
型號: AN8011S
廠商: PANASONIC CORP
元件分類: 穩(wěn)壓器
英文描述: 2-channel step-down, step-up, or inverting use DC-DC converter control IC
中文描述: SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO16
封裝: 0.225 INCH, PLASTIC, SOP-16
文件頁數(shù): 11/16頁
文件大?。?/td> 161K
代理商: AN8011S
11
Voltage Regulators
AN8011S
I
Application Notes (continued)
[2] Function descriptions (continued)
4. Timer latch short-circuit protection circuit
This circuit protects the external main swiching devices, switching diodes, choke coils, and etc. from
destruction or deterioration if overload or short-circuit of power supply output lasts for a certain time.
The timer latch type short-circuit protection circuit detects the output level of each error amplifier, and when
the ouput level of either one or both of the error amplifiers exceeds 1.85 V typical, the timer circuit is actuated, and
initiates charging the external capacitor for protection enable.
If the ouput of the error amplifier does not return to a normal voltage range by the time when the voltage of
this capacitor reaches 1.25 V, it sets the latch circuit, cuts off the ouput drive transistor, and sets the dead time to
100%.
5. Low input voltage malfunction prevention circuit (U.V.L.O.)
This circuit protects the system from destruction or deterioration due to control malfunction caused by the
supply voltage reduction in the transient state of power on or off.
The low input voltage malfunction prevention circuit detects the internal reference voltage according to the
supply voltage level, and cuts off the output drive transistor by resetting the latch circuit, thereby setting the dead-
time to 100% and keeping the latch terminal low.
6. PWM comparator block
The PWM comparators, each has one inverted input, and two noninverted inputs, and controls the on-period
of output pulse in accordance with the input voltage. It turns on the output transistor during the period when the
triangular wave of C
T
terminal is lower than either the error amplifier ouput voltage or the DTC terminal voltage.
The dead-time is set by the addition of a resistor between the DTC terminal and GND. By the addition of a
capacitor in parallel with the external resistor R
DTC
, the soft start function which gradually extends the on-period
of the ouput pulse by the RC time constant when the power supply is turned on starts to work.
7. Output block
The ouput drive transistor is of open-collector type output connected in Darlington circuit of emitter common
GND. The breakdown voltage of the collector ouput terminal is 34 V and it is possible to obtain up to 100 mA
ouput current.
8. Remote circuit
It is possible to switch on/off the IC control by an external control signal. When the on/off terminal voltage is
lowered to a value below approximately 0.8 V, the internal reference voltage goes down, thereby the IC control
is stopped and the circuit current is decreased to 5
μ
A or less. When the on/off terminal voltage is increased to a
value higher than approximately 2.0 V, the internal reference voltage raises and the control operation is started.
[3] The time constant setting method for timer latch type short-circuit protection circuit
Figure 3 shows the block diagram of the protection latch circuit. The comparator for short-circuit protection
compares the output voltage of error amplifier V
FB
with the reference voltage (1.85 V) at all the time. When the load
conditions of DC-DC converter output is stabilized, there is no fluctuation of error amplifier output, and the short-
circuit protection comparator also keeps the balance. At this moment, the switch SW1 will be in the off state, and the
latch terminal voltage will be kept at approximately 0.9 V typical.
When the load conditions suddenly change, and high-level signal (1.85 V typical of higher) is inputted from the
error amplifier to the noninverted input of the short-circuit protection comparator, the short-circuit protection com-
parator outputs the high-level signal. This signal turns on the switch SW1, and the charging to the capacitor C
S
connected externally to the latch terminal is started with a current of 80
μ
A typical.
When the external capacitor C
S
is charged up to approximately 1.25 V typical, the latch circuit is set and the under-
voltage lock-out circuit (U.V.L.O.) is enabled, thereby the ouput drive transistor is cut off and the dead-time is set to
100%.
Once the under-voltage lock-out circuit (U.V.L.O.) is enabled, the latch circuit will not be reset unless the power
supply is switched off.
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