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參數(shù)資料
| 型號(hào)： | AN7397S |
| 廠商： | PANASONIC CORP |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Spatializer IC for I2C bus |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO20 |
| 封裝： | PLASTIC, SOP-20 |
| 文件頁(yè)數(shù)： | 3/7頁(yè) |
| 文件大?。?/td> | 149K |
| 代理商： | AN7397S |
AN7397K, AN7397S
3
SDC00027BEB
■
Electrical Characteristics at V
CC
=
5 V, f
=
1 kHz, T
a
=
25
°
C
±
2
°
C
Parameter
Symbol
Note) *1: In measuring, the filter with A-characteristic curve is used.
*2: In measuring, the filter for the range of 15 Hz to 30 kHz (12 dB/OCT) is used.
*3: Mode: ST, L-in
+
R-in, VCA (I
2
C data: BFH)
*4: Mode: ST, VCA (I
2
C data: BFH)
*5: Mode: ST, VCA (I
2
C data: 80 H)
*6: Mode: ST, VCA (I
2
C data: 80 H) for either L-in or R-in
Design reference data
Conditions
Min
Typ
Max
Unit
Total circuit current
I
TOTAL
V
IN
=
0 mV
L-in, R-in THD
=
1%
L-out, R-out R
G
=
4.7 k
L-out, R-out V
IN
=
400 mV
L-out, R-out V
IN
=
400 mV
S-out R
G
=
4.7 k
S-out V
IN
=
60 mV
S-out V
IN
=
60 mV
18
25
32
mA
Maximum output voltage
*3
V
OUT1
0.8
1.0
V[rms]
Output noise voltage 1
*1, 4
V
NO1
2
20
50
μ
V[rms]
Voltage gain 1
*3
G
V1
0
2
dB
Total harmonic distortion 1
*2, 3
THD
1
0.05
0.2
%
Output noise voltage 2
*1, 5
V
NO2
80
200
μ
V[rms]
Voltage gain 2
*6
G
V2
343
450
685
mV[rms]
Total harmonic distortion 2
*2, 6
THD
2
0.15
0.3
%
I
2
C interface
Sink current at ACK
I
ACK
Maximum value of sink current of
pin 11 at ACK
2.0
10
mA
SCL/SDA signal input high- level
V
IHI
2.5
3.5
V
SCL/SDA signal input low- level
V
ILO
0
0.5
V
Input-enable maximum frequency
f
Imax
100
Kbit/s
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
I
2
C interface
Bus free before start
t
BUF
4.0
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
Start condition set-up time
t
SU, STA
4.0
Start condition hold time
t
HD, STA
4.0
SCL/SDA low period
t
LO
4.0
SCL high period
t
HI
4.0
SCL/SDA rise time
t
R
1.0
SCL/SDA fall time
t
F
0.35
Data set-up time (Write)
t
SU, DAT
0.25
Data hold time (Write)
t
HD, DAT
0
Acknowledge set-up time
t
SU, ACK
3.5
Acknowledge hold time
t
HD, ACK
0
Stop condition set-up time
t
SU, STO
4.0
DAC
6-bit DAC DNLE
L
6
1 LSB
=
(Data (max.)
Data (00))/63
0.1
1.0
1.9
LSB
step
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